AN5D: automated stencil framework for high-degree temporal blocking on GPUs - Kazuaki Matsumura; Hamid Reza Zohouri; Mohamed Wahib; Toshio Endo; Satoshi Matsuoka (CGO '20: 18th ACM/IEEE International Symposium on Code Generation and Optimization, San Diego, CA, USA, February, 2020, 2020)

AN5D: Automated Stencil Framework for High-Degree Temporal Blocking on GPUs - Kazuaki Matsumura; Hamid Reza Zohouri; Mohamed Wahib; Toshio Endo; Satoshi Matsuoka (CoRR, 2020)

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL - Hamid Reza Zohouri; Artur Podobas; Satoshi Matsuoka (CoRR, 2020)

The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface - Hamid Reza Zohouri; Satoshi Matsuoka (2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, H2RC@SC 2019, Denver, CO, USA, November 17, 2019, 2019)

The Memory Controller Wall: Benchmarking the Intel FPGA SDK for OpenCL Memory Interface - Hamid Reza Zohouri; Satoshi Matsuoka (CoRR, 2019)

Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL - Hamid Reza Zohouri; Artur Podobas; Satoshi Matsuoka (Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2018, Monterey, CA, USA, February 25-27, 2018, 2018)

High-Performance High-Order Stencil Computation on FPGAs Using OpenCL - Hamid Reza Zohouri; Artur Podobas; Satoshi Matsuoka (2018 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPS Workshops 2018, Vancouver, BC, Canada, May 21-25, 2018, 2018)

Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL - Hamid Reza Zohouri; Artur Podobas; Satoshi Matsuoka (CoRR, 2018)

High Performance Computing with FPGAs and OpenCL - Hamid Reza Zohouri (CoRR, 2018)

Evaluating high-level design strategies on FPGAs for high-performance computing - Artur Podobas; Hamid Reza Zohouri; Naoya Maruyama; Satoshi Matsuoka (27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017, 2017)

Evaluating high-level design strategies on FPGAs for high-performance computing - Artur Podobas; Hamid Reza Zohouri; Naoya Maruyama; Satoshi Matsuoka (27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017, 2017)

Evaluating and optimizing OpenCL kernels for high performance computing with FPGAs - Hamid Reza Zohouri; Naoya Maruyama; Aaron Smith; Motohiko Matsuda; Satoshi Matsuoka (Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2016, Salt Lake City, UT, USA, November 13-18, 2016, 2016)