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Stephan Henzler
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2010 – 2019
- 2016
- [c15]Junjie Kong, Stephan Henzler, Doris Schmitt-Landsiedel, Liter Siek
:
A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC. APCCAS 2016: 348-351 - 2010
- [c14]Stephan Henzler:
Digitalization of mixed-signal functionality in nanometer technologies. ICCAD 2010: 252-255
2000 – 2009
- 2009
- [c13]Matthias Eireiner, Doris Schmitt-Landsiedel, Paul Wallner, Andreas Schöne, Stephan Henzler, Ulrich Fiedler:
Adaptive circuit block model for power supply noise analysis of low power system-on-chip. SoC 2009: 13-18 - 2008
- [j5]Stephan Henzler, Siegmar Koeppe, Dominik Lorenz, Winfried Kamp, Ronald Kuenemund, Doris Schmitt-Landsiedel:
A Local Passive Time Interpolation Concept for Variation-Tolerant High-Resolution Time-to-Digital Conversion. IEEE J. Solid State Circuits 43(7): 1666-1676 (2008) - [j4]Stephan Henzler, Siegmar Koeppe:
Design and Application of Power Optimized High-Speed CMOS Frequency Dividers. IEEE Trans. Very Large Scale Integr. Syst. 16(11): 1513-1520 (2008) - [c12]Stephan Henzler, Siegmar Koeppe, Winfried Kamp, Hans Mulatz, Doris Schmitt-Landsiedel:
90nm 4.7ps-Resolution 0.7-LSB Single-Shot Precision and 19pJ-per-Shot Local Passive Interpolation Time-to-Digital Converter with On-Chip Characterization. ISSCC 2008: 548-549 - 2007
- [j3]Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Andre Bonnardot, Steffen Buch, Matthias Sauer:
A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions. IEEE J. Solid State Circuits 42(1): 134-144 (2007) - [j2]Matthias Eireiner, Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations. IEEE J. Solid State Circuits 42(7): 1583-1592 (2007) - [c11]Stephan Henzler, Siegmar Koeppe, Dominik Lorenz, Winfried Kamp, Ronald Kuenemund, Doris Schmitt-Landsiedel:
Variation tolerant high resolution and low latency time-to-digital converter. ESSCIRC 2007: 194-197 - 2006
- [j1]Stephan Henzler, Georg Georgakos, Matthias Eireiner, Thomas Nirschl, Christian Pacha, Jörg Berthold, Doris Schmitt-Landsiedel:
Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. IEEE J. Solid State Circuits 41(7): 1654-1661 (2006) - [c10]Stephan Henzler, Siegmar Koeppe:
High-speed low-power frequency divider with intrinsic phase rotator. ISLPED 2006: 286-291 - [c9]Thomas Lüftner, Jörg Berthold, Christian Pacha, Georg Georgakos, Guillaume Sauzon, Olaf Hömke, Jurij Beshenar, Peter Mahrla, Knut M. Just, Peter Hober, Stephan Henzler, Doris Schmitt-Landsiedel, Andre Yakovleff, Axel Klein, Richard J. Knight, Pramod Acharya, Hamid Mabrouki, Goulhamid Juhoor, Matthias Sauer:
A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions. ISSCC 2006: 952-961 - 2005
- [c8]Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel:
Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. Conf. Computing Frontiers 2005: 414-420 - [c7]Jürgen Fischer, Ettore Amirante, Thomas Nirschl, Philip Teichmann, Stephan Henzler, Doris Schmitt-Landsiedel:
Impact of process parameter variations on the energy dissipation in adiabatic logic. ECCTD 2005: 429-432 - [c6]Stephan Henzler, Thomas Nirschi, Christian Pacha, Peter Spindler, Philip Teichmann, Michael Fulde, Jürgen Fischer, Matthias Eireiner, Thomas Fischer, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. ESSCIRC 2005: 145-148 - [c5]Philip Teichmann, Jürgen Fischer, Stephan Henzler, Ettore Amirante, Doris Schmitt-Landsiedel:
Power-Clock Gating in Adiabatic Logic Circuits. PATMOS 2005: 638-646 - 2004
- [c4]Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption. PATMOS 2004: 392-401 - [c3]Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits. PATMOS 2004: 789-798 - 2003
- [c2]Stephan Henzler, Philip Teichmann, Markus Koban, Jörg Berthold, Georg Georgakos, Doris Schmitt-Landsiedel:
Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes. VLSI-SoC (Selected Papers) 2003: 229-245 - [c1]Stephan Henzler, Markus Koban, Doris Schmitt-Landsiedel, Jörg Berthold, Georg Georgakos:
Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes. VLSI-SOC 2003: 246-251
Coauthor Index
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