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Bruno Forlin
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2020 – today
- 2024
- [c14]Bruno Forlin, Kuan-Hsun Chen, Nikolaos Alachiotis, Luca Cassano, Marco Ottavi:
Lightweight Instrumentation for Accurate Performance Monitoring in RTOSes. DATE 2024: 1-2 - [c13]Elia Lazzeri, Bruno E. Forlin, Gianluca Furano, Marco Ottavi, Luca Cassano:
An Experimental Comparison of RISC-V Processors: Performance, Power, Area and Security - Special Session Paper-. DFT 2024: 1-6 - [c12]Tijmen T. Smit, Bruno E. Forlin, Kuan-Hsun Chen, Ioanna Souvatzoglou, Mihalis Psarakis, Marco Ottavi:
An Enhanced Fault Injection Framework for FPGA-Based Soft-Cores. DFT 2024: 1-6 - [c11]Bruno Forlin, Edian B. Annink, Elijah Cishugi, Carlo Cazzaniga, Paolo Rech, Gerard K. Rauwerda, Gianluca Furano, Marco Ottavi:
Neutron Beam Evaluation of Probabilistic Data Structure-based Online Checkers. IOLTS 2024: 1-6 - [i1]Michael Rogenmoser, Philip Wiese, Bruno E. Forlin, Frank K. Gürkaynak, Paolo Rech, Alessandra Menicucci, Marco Ottavi, Luca Benini:
Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC. CoRR abs/2407.05938 (2024) - 2023
- [j3]Paulo C. Santos
, Bruno E. Forlin
Plug N' PIM: An integration strategy for Processing-in-Memory accelerators. Integr. 88: 185-195 (2023) - [c10]Kevin Böhmer, Bruno Forlin, Carlo Cazzaniga, Paolo Rech, Gianluca Furano, Nikolaos Alachiotis, Marco Ottavi
Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs. DFT 2023: 1-6 - [c9]Bruno E. Forlin, Wouter van Huffelen, Carlo Cazzaniga, Paolo Rech, Nikolaos Alachiotis, Marco Ottavi
An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds? ETS 2023: 1-6 - 2022
- [j2]Bruno E. Forlin
Sim2PIM: A complete simulation framework for Processing-in-Memory. J. Syst. Archit. 128: 102528 (2022) - [c8]Paulo Cesar Santos, Bruno E. Forlin, Marco A. Z. Alves, Luigi Carro:
Aggressive Performance Improvement on Processing-in-Memory Devices by Adopting Hugepages. ASAP 2022: 60-63 - 2021
- [c7]Paulo C. Santos, Bruno E. Forlin, Luigi Carro:
Providing Plug N' Play for Processing-in-Memory Accelerators. ASP-DAC 2021: 651-656 - [c6]Paulo C. Santos, Bruno E. Forlin, Luigi Carro:
Sim2PIM: A Fast Method for Simulating Host Independent & PIM Agnostic Designs. DATE 2021: 226-231 - 2020
- [c5]Bruno Forlin, Ronaldo Husemann, Luigi Carro, Cezar Reinbrecht
G-PUF: An Intrinsic PUF Based on GPU Error Signatures. ETS 2020: 1-2 - [c4]Cezar Reinbrecht
Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs. ISVLSI 2020: 536-541
2010 – 2019
- 2019
- [j1]Cezar Reinbrecht, Bruno Forlin, Johanna Sepúlveda:
Cache timing attacks on NoC-based MPSoCs. Microprocess. Microsystems 66: 1-9 (2019) - [c3]Bruno Forlin, Cezar Reinbrecht, Johanna Sepúlveda:
Attacking Real-time MPSoCs: Preemptive NoCs are Vulnerable. VLSI-SoC 2019: 204-209 - [c2]Bruno Forlin, Cezar Reinbrecht, Johanna Sepúlveda:
Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs. VLSI-SoC (Selected Papers) 2019: 209-233 - 2018
- [c1]Cezar Reinbrecht, Bruno Forlin, Andreas Zankl
Earthquake - A NoC-based optimized differential cache-collision attack for MPSoCs. DATE 2018: 648-653
Coauthor Index
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