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Venakata Chaitanya Krishna Chekuri
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2020 – today
- 2024
- [c12]Nael Mizanur Rahman, Uday Kamal, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay:
Passive Lightweight On-chip Sensors for Power Side Channel Attack Detection. ISCAS 2024: 1-5 - 2022
- [j5]Edward Lee
, Nael Mizanur Rahman, Venkata Chaitanya Krishna Chekuri
A Low-Power Authentication IC for Visible-Light-Based Interrogation. IEEE Trans. Ind. Electron. 69(3): 3120-3130 (2022) - [c11]Shida Zhang
Analysis of the Effect of Hot Carrier Injection in An Integrated Inductive Voltage Regulator. ISLPED 2022: 12:1-12:6 - 2020
- [j4]Arvind Singh
Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDO. IEEE J. Solid State Circuits 55(2): 478-493 (2020) - [j3]Venkata Chaitanya Krishna Chekuri
An Inductive Voltage Regulator With Overdrive Tracking Across Input Voltage in Cascoded Power Stage. IEEE Trans. Circuits Syst. 67-II(12): 3083-3087 (2020) - [j2]Jinwoo Kim
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2424-2437 (2020) - [c10]Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Edward Lee, Arvind Singh, Saibal Mukhopadhyay:
A Fully Synthesized Integrated Buck Regulator with Auto-generated GDS-II in 65nm CMOS Process. CICC 2020: 1-4 - [c9]Edward Lee, Nael Mizanur Rahman, Venkata Chaitanya Krishna Chekuri, Saibal Mukhopadhyay:
An Authentication IC with Visible Light Based Interrogation in 65nm CMOS. CICC 2020: 1-4 - [c8]Nael Mizanur Rahman, Edward Lee, Venkata Chaitanya Krishna Chekuri, Arvind Singh, Saibal Mukhopadhyay:
A Configurable Dual-Mode PRINCE Cipher with Security Aware Pipelining in 65nm for High Throughput Applications. CICC 2020: 1-4 - [c7]Jinwoo Kim, Venkata Chaitanya Krishna Chekuri, Nael Mizanur Rahman, Majid Ahadi Dolatsara, Hakki Mert Torun, Madhavan Swaminathan, Saibal Mukhopadhyay, Sung Kyu Lim:
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. ICCD 2020: 80-87 - [c6]Venkata Chaitanya Krishna Chekuri, Arvind Singh, Nael Mizanur Rahman, Edward Lee, Saibal Mukhopadhyay:
Aging Challenges in On-chip Voltage Regulator Design. IRPS 2020: 1-8
2010 – 2019
- 2019
- [j1]Venkata Chaitanya Krishna Chekuri
Autotuning of Integrated Inductive Voltage Regulator Using On-Chip Delay Sensor to Tolerate Process and Passive Variations. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1768-1778 (2019) - [c5]Jinwoo Kim, Gauthaman Murali
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. DAC 2019: 178 - [c4]Hakki Mert Torun, Huan Yu, Nihar Dasari, Venkata Chaitanya Krishna Chekuri
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors. ICCAD 2019: 1-8 - [c3]Venkata Chaitanya Krishna Chekuri
On the Effect of NBTI Induced Aging of Power Stage on the Transient Performance of On-Chip Voltage Regulators. IRPS 2019: 1-5 - [c2]Venkata Chaitanya Krishna Chekuri
Automatic GDSII Generator for On-Chip Voltage Regulator for Easy Integration in Digital SoCs. ISLPED 2019: 1-6 - 2018
- [c1]Venakata Chaitanya Krishna Chekuri
Performance based tuning of an inductive integrated voltage regulator driving a digital core against process and passive variations. DATE 2018: 367-372
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