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Michael Q. Le
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Journal Articles
- 2009
- [j4]Chun-Ying Chen, Michael Q. Le, Kwang Young Kim:
A Low Power 6-bit Flash ADC With Reference Voltage and Common-Mode Calibration. IEEE J. Solid State Circuits 44(4): 1041-1046 (2009) - 2003
- [j3]John P. Keane, Michael Q. Le, Paul J. Hurst:
Analog timing recovery for a noise-predictive decision-feedback equalizer. IEEE J. Solid State Circuits 38(2): 338-342 (2003) - 2002
- [j2]Michael Q. Le, Paul J. Hurst, John P. Keane:
An adaptive analog noise-predictive decision-feedback equalizer. IEEE J. Solid State Circuits 37(2): 105-113 (2002) - 1999
- [j1]Michael Q. Le, Paul J. Hurst, Kenneth C. Dyer:
An analog DFE for disk drives using a mixed-signal integrator. IEEE J. Solid State Circuits 34(5): 592-598 (1999)
Conference and Workshop Papers
- 2019
- [c3]Chang-Feng Loi, A. Mellati, Amber Tan, A. Farhoodfar, Arun Tiruvur, Belal Helal, Bob Killips, Farshid Rafiee Rad, Jamal Riani, Jorge Pernillo, J. Sun, J. Wong, K. Abdelhalim, K. Gopalakrishnan, Kwang Young Kim, Lawrence Tse, M. Davoodi, Michael Q. Le, M. Zhang, M. Talegaonkar, P. Prabha, Ravindran Mohanavelu, S. Chong, Simon Forey, S. Netto, Sudeep Bhoja, W. Liew, Yida Duan, Y. Liao:
A 400Gb/s Transceiver for PAM-4 Optical Direct-Detect Application in 16nm FinFET. ISSCC 2019: 120-122 - 2017
- [c2]Michael Q. Le, James Gorecki, Jamal Riani, Jorge Pernillo, A. Tan, K. Gopalakrishnan, Belal Helal, Pulkit Khandelwal, Chang-Feng Loi, Irene Quek, P. Wong, Aaron Buchwald:
A background calibrated 28GS/s 8b interleaved SAR ADC in 28nm CMOS. CICC 2017: 1-4 - 2016
- [c1]Karthik Gopalakrishnan, Alan Ren, Amber Tan, Arash Farhood, Arun Tiruvur, Belal Helal, Chang-Feng Loi, Chris Jiang, Halil Cirit, Irene Quek, Jamal Riani, James Gorecki, Jennifer Wu, Jorge Pernillo, Lawrence Tse, Michael Q. Le, Mohammad Ranjbar, Pui-Shan Wong, Pulkit Khandelwal, Rajesh Narayanan, Ravindran Mohanavelu, Sameer Herlekar, Sudeep Bhoja, Vlad Shvydun:
3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS. ISSCC 2016: 62-63
Coauthor Index
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