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Fuzhan Chen
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2020 – today
- 2024
- [c8]Fuzhan Chen
, C. Patrick Yue, Quan Pan:
A 56-Gbaud 7.3-Vppd Linear Modulator Transmitter with AMUX-Based Reconfigurable FFE and Dynamic Triple-Stacked Driver in 130-nm SiGe BiCMOS. CICC 2024: 1-2 - [c7]Chongyun Zhang
A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm2 area in 28-nm CMOS. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c6]Fuzhan Chen
A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS. ESSCIRC 2023: 373-376 - [c5]Shuo Feng, Fuzhan Chen, Quan Pan:
A Power-Efficient $\boldsymbol{4}-\mathbf{V}_{\mathbf{ppd}}$ 128-Gb/s PAM-4 Optical Modulator Driver with Merged BV Doubler Topology in 130-nm BiCMOS. ICTA 2023: 190-191 - 2022
- [c4]Shuo Feng, Fuzhan Chen, Zhenghao Li, Wentao Zhou, Dongfan Xu, Chun-Zhang Chen, Xuhui Liu, Hanming Wu, Quan Pan:
A 4-Vppd160-Gb/s PAM-4 Optical Modulator Driver with All-Pass Filter-Based Dynamic Bias and 2- Tap FFE in 130-nm BiCMOS. APCCAS 2022: 1-5 - [c3]Chongyun Zhang
A 56-Gb/s PAM-4 Transmitter Using Silicon Photonic Microring Modulator in 40nm CMOS. MWSCAS 2022: 1-4 - 2021
- [c2]Fuzhan Chen
Design and Co-Simulation of QPSK and NRZ/PAM-4/PAM-8 VCSEL-Based Optical Links Utilizing an Integrated System Evaluation Engine. ASICON 2021: 1-4 - [c1]Weimin Shi, Fuzhan Chen, Xinyi Liu, Chongyun Zhang, Zilu Liu, Tianxin Min, Bo Xu, Li Wang
An Integrated System Evaluation Engine for Cross-Domain Simulation and Design Optimization of High-Speed 5G Millimeter-Wave Wireless SoCs. ASICON 2021: 1-4
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