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Tsuneo Tsukahara
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2010 – 2019
- 2017
- [j11]Mamoru Ugajin, Takuya Shindo, Tsuneo Tsukahara, Takefumi Hiraguri:
An (N+N2)-Mixer Architecture for a High-Image-Rejection Wireless Receiver with an N-Phase Active Complex Filter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(4): 1008-1014 (2017) - 2015
- [j10]Mamoru Ugajin, Yuta Kobayashi, Tsuneo Tsukahara:
High-image-rejection wireless-receiver architecture with a 3-phase active RC complex filter. IEICE Electron. Express 12(12): 20150329 (2015) - [c13]Toshiaki Miyazaki, Peng Li, Song Guo
, Junji Kitamichi, Takafumi Hayashi
On-demand Customizable Wireless Sensor Network. ANT/SEIT 2015: 302-309 - 2014
- [c12]Toshiaki Miyazaki, Shoichi Yamaguchi, Koji Kobayashi, Junji Kitamichi, Song Guo
A software defined wireless sensor network. ICNC 2014: 847-852 - [c11]Toshiaki Miyazaki, Hiroki Iwata, Koji Kobayashi, Shoichi Yamaguchi, Deze Zeng, Song Guo
DASN: demand-addressable sensor network for active information acquisition. ICUIMC 2014: 1:1-1:7 - 2013
- [c10]Shoichi Yamaguchi, Toshiaki Miyazaki, Junji Kitamichi, Song Guo
Programmable wireless sensor node featuring low-power FPGA and microcontroller. iCAST/UMEDIA 2013: 596-601 - [c9]Deze Zeng, Toshiaki Miyazaki, Song Guo
Evolution of Software-Defined Sensor Networks. MSN 2013: 410-413
2000 – 2009
- 2006
- [j9]Tsuneo Tsukahara:
Special Section on Analog Circuit and Device Technologies. IEICE Trans. Electron. 89-C(6): 663 (2006) - 2004
- [j8]Mamoru Ugajin, Akihiro Yamagishi, Junichi Kodate, Mitsuru Harada, Tsuneo Tsukahara:
Macromodels in the frequency domain analysis of microwave resonators. IEEE J. Solid State Circuits 39(4): 569-576 (2004) - [c8]Mamoru Ugajin, Akihiro Yamagishi, Junichi Kodate, Mitsuru Harada, Tsuneo Tsukahara:
Design techniques for a 1-V operation Bluetooth RF transceiver. CICC 2004: 393-400 - [c7]Koji Fujii, Jun Terada, Junichi Kodate, Tsuneo Tsukahara, Shin'ichiro Mutoh, Yuichi Kado:
A 2-Mb/s, UHF-band, wireless sensor node for real-time multi-point sensing. ISCAS (4) 2004: 912-915 - 2003
- [c6]Tsuneo Tsukahara, Mitsuru Harada, Mamoru Ugajin, Junichi Kodate, Akihiro Yamagishi:
Design methodology of low-power CMOS RF-ICs. ASP-DAC 2003: 394-399 - [c5]Mamoru Ugajin, Tsuneo Tsukahara:
A 1-V 2.4-GHz FSK receiver with a complex BPF and a frequency doubler in CMOS/SOI. CICC 2003: 151-154 - [c4]Takakuni Douseki, Tsuneo Tsukahara, Yoshifumi Yoshida, Fumiyasu Utsunomiya, Norio Hama:
A batteryless wireless system with MTCMOS/SOI circuit technology. CICC 2003: 163-168 - 2002
- [j7]Mamoru Ugajin, Junichi Kodate, Tsuneo Tsukahara:
A 1-V 2-GHz RF Receiver with 49 dB of Image Rejection in CMOS/SIMOX. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(2): 293-299 (2002) - 2000
- [j6]Mitsuru Harada, Tsuneo Tsukahara, Junichi Kodate, Akihiro Yamagishi, Junzo Yamada:
2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V. IEEE J. Solid State Circuits 35(12): 2000-2004 (2000)
1990 – 1999
- 1999
- [j5]Hiroto Matsuoka, Tsuneo Tsukahara:
A 5-GHz frequency-doubling quadrature modulator with a ring-type local oscillator. IEEE J. Solid State Circuits 34(9): 1345-1348 (1999) - 1998
- [j4]Akihiro Yamagishi, Masayuki Ishikawa, Tsuneo Tsukahara, Shigeru Date:
A 2-V, 2-GHz low-power direct digital frequency synthesizer chip-set for wireless communication. IEEE J. Solid State Circuits 33(2): 210-217 (1998) - 1996
- [j3]Tsuneo Tsukahara, Masayuki Ishikawa, Masahiro Muraguchi:
A 2-V 2-GHz Si-bipolar direct-conversion quadrature modulator. IEEE J. Solid State Circuits 31(2): 263-267 (1996) - 1994
- [c3]Mamoru Ogasawara, Hirofumi Ichikawa, Tsuneo Tsukahara:
High isolation analog 4×4 matrix switch LSI for centralized control microcell radio systems. PIMRC 1994: 369-373 - [c2]Masahiro Muraguchi, Tsuneo Tsukahara, Masashi Nakatsugawa
1.9 GHz-band low voltage and low power consumption RF IC chip-set for personal communications. VTC 1994: 504-507
1980 – 1989
- 1989
- [j2]Masayuki Ishikawa, Tsuneo Tsukahara:
An 8-bit 50-MHz CMOS subranging A/D converter with pipelined wide-band S/H. IEEE J. Solid State Circuits 24(6): 1485-1491 (1989) - 1988
- [j1]Eiichi Sano, Tsuneo Tsukahara, Atsushi Iwata:
Performance limits of mixed analog/digital circuits with scaled MOSFETs. IEEE J. Solid State Circuits 23(4): 942-949 (1988) - 1986
- [c1]Masayuki Ishikawa, Tsuneo Tsukahara, Tadakatsu Kimura:
VLSI Architecture for an adaptive equalizer in ISDN line termination. ICASSP 1986: 1525-1528
Coauthor Index
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