Low Latency Binary Edward Curve Crypto Processor for FPGA Platforms. - Vidhya, J. Adline; Venkatasubramani, V. R.; Rajaram, S.; Thyagarajan, V. Vinoth; Manikandan, M. S. K. (2024)

A parallel elliptic curve crypto-processor architecture with reduced clock cycle for FPGA platforms. - Kalaiarasi, Murugesan; Venkatasubramani, Vepadappu Raman; Thyagarajan, V. Vinoth; Rajaram, S. (J. Supercomput., 2022)