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Joshua Yung Lih Low

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2010 – 2019

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2018
[j4]
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Joshua Yung Lih Low, Ching-Chuen Jong:
Range Mapping - A Fresh Approach to High Accuracy Mitchell-Based Logarithmic Conversion Circuit Design. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 175-184 (2018)
2015
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Joshua Yung Lih Low, Ching-Chuen Jong:
Unified Mitchell-Based Approximation for Efficient Logarithmic Conversion Circuit. IEEE Trans. Computers 64(6): 1783-1797 (2015)
2013
[j2]
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Joshua Yung Lih Low, Ching-Chuen Jong:
A Memory-Efficient Tables-and-Additions Method for Accurate Computation of Elementary Functions. IEEE Trans. Computers 62(5): 858-872 (2013)
[c5]
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Joshua Yung Lih Low, Ching-Chuen Jong:
Non-iterative high speed division computation based on Mitchell logarithmic method. ISCAS 2013: 2219-2222
2012
[c4]
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Howard Tang, Joshua Yung Lih Low, Jeremy Yung Shern Low, Liter Siek, Ching-Chuen Jong, Chip-Hong Chang:
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion. APCCAS 2012: 272-275
[c3]
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Joshua Yung Lih Low, Ching-Chuen Jong, Jeremy Yung Shern Low, Thian Fatt Tay, Chip-Hong Chang:
A fast and compact circuit for integer square root computation based on Mitchell logarithmic method. ISCAS 2012: 1235-1238
2011
[j1]
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Anh-Tuan Do, Jeremy Yung Shern Low, Joshua Yung Lih Low, Zhi-Hui Kong, Xiaoliang Tan, Kiat Seng Yeo:
An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(6): 1252-1263 (2011)
2010
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Joshua Yung Lih Low, Ching-Chuen Jong:
High accuracy binary logarithmic conversion using range mapping for DSP applications. APCCAS 2010: 332-335
[c1]
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Anh-Tuan Do, Kiat Seng Yeo, Jeremy Yung Shern Low, Joshua Yung Lih Low, Zhi-Hui Kong:
An 8T SRAM cell with column-based dynamic supply voltage for bit-interleaving. APCCAS 2010: 704-707

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