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Costas Argyrides
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2020 – today
- 2023
- [c27]Costas Argyrides, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian:
Utilizing ECC Analytics to Improve Memory Lifecycle Management. ITC 2023: 383-387 - 2022
- [c26]Costas Argyrides, Vilas Sridharan, Hayk Danoyan, Gurgen Harutyunyan, Yervant Zorian:
A Novel Protection Technique for Embedded Memories with Optimized PPA. ITC 2022: 642-645 - [c25]Minqiang Peng, Youfa Wu, Jialiang Li, Alex Yu, Grigor Tshagharyan, Costas Argyrides, Vilas Sridharan, Gurgen Harutyunyan, Yervant Zorian, Nilanjan Mukherjee:
Innovative Practices Track: What's Next for Automotive: Where and How to Improve Field Test and Enhance SoC Safety. VTS 2022: 1
2010 – 2019
- 2019
- [c24]Jiaqiang Li, Pedro Reviriego
, Costas Argyrides, Liyi Xiao:
Efficient Concurrent Error Detection for SEC-DAEC Encoders. IOLTS 2019: 165-170 - 2018
- [j6]Jiaqiang Li
Extending 3-bit Burst Error-Correction Codes With Quadruple Adjacent Error Correction. IEEE Trans. Very Large Scale Integr. Syst. 26(2): 221-229 (2018) - [c23]Hayk T. Grigoryan, Samvel K. Shoukourian, Gurgen Harutyunyan, Yervant Zorian, Costas Argyrides:
Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs. ITC 2018: 1-6 - 2013
- [j5]Costas Argyrides, Pedro Reviriego
Using Single Error Correction Codes to Protect Against Isolated Defects and Soft Errors. IEEE Trans. Reliab. 62(1): 238-243 (2013) - 2012
- [j4]Pedro Reviriego, Costas Argyrides, Juan Antonio Maestro
Efficient error detection in Double Error Correction BCH codes for memory applications. Microelectron. Reliab. 52(7): 1528-1530 (2012) - 2011
- [j3]Juan Antonio Maestro
Fault Tolerant Single Error Correction Encoders. J. Electron. Test. 27(2): 215-218 (2011) - [j2]Costas Argyrides, Raul Chipana, Fabian Vargas, Dhiraj K. Pradhan:
Reliability Analysis of H-Tree Random Access Memories Implemented With Built in Current Sensors and Parity Codes for Multiple Bit Upset Correction. IEEE Trans. Reliab. 60(3): 528-537 (2011) - [j1]Costas Argyrides, Dhiraj K. Pradhan, Taskin Koçak:
Matrix Codes for Reliable and Cost Efficient Memory Chips. IEEE Trans. Very Large Scale Integr. Syst. 19(3): 420-428 (2011) - [c22]Costas Argyrides, Ronaldo Rodrigues Ferreira, Carlos Arthur Lang Lisbôa, Luigi Carro
Decimal Hamming: A Software-Implemented Technique to Cope with Soft Errors. DFT 2011: 11-17 - 2010
- [c21]J. F. Tarillo, Nikolaos Mavrogiannakis, Carlos Arthur Lang Lisbôa, Costas Argyrides, Luigi Carro
Multiple Bit Error Detection and Correction in Memory. DSD 2010: 652-657 - [c20]Nikolaos Mavrogiannakis, Costas Argyrides, Dhiraj K. Pradhan:
Improving reliability for bit parallel finite field multipliers using Decimal Hamming. EWDTS 2010: 69-72 - [c19]Costas Argyrides, Nikolaos Mavrogiannakis, Dhiraj K. Pradhan:
Improved Yield in Nanotechnology Circuits Using Non-square Meshes. ISVLSI 2010: 410-415 - [c18]Jimmy Tarrillo
Evaluation of a new low cost software level fault tolerance technique to cope with soft errors. LATW 2010: 1-3
2000 – 2009
- 2009
- [c17]Costas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro
A fast error correction technique for matrix multiplication algorithms. IOLTS 2009: 133-137 - [c16]Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro
Increasing memory yield in future technologies through innovative design. ISQED 2009: 622-626 - [c15]Costas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro
Single element correction in sorting algorithms with minimum delay overhead. LATW 2009: 1-6 - [c14]Costas Argyrides, Giorgos Dimosthenous, Dhiraj K. Pradhan, Carlos Arthur Lang Lisbôa, Luigi Carro
Reliability aware yield improvement technique for nanotechnology based circuits. SBCCI 2009 - 2008
- [c13]Costas Argyrides, Stephania Loizidou Himona, Dhiraj K. Pradhan:
Yield improvement and power aware low cost memory chips. WREFT@CF 2008: 353-358 - [c12]Costas Argyrides, Fabian Vargas, Marlon Moraes, Dhiraj K. Pradhan:
Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. IOLTS 2008: 155-160 - [c11]Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan:
Area Reliability Trade-Off in Improved Reed Muller Coding. SAMOS 2008: 116-125 - [c10]Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman
Single Error Correcting Finite Field Multipliers Over GF(2m). VLSI Design 2008: 33-38 - [c9]Carlos Arthur Lang Lisbôa, Costas Argyrides, Dhiraj K. Pradhan, Luigi Carro
Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. VTS 2008: 363-370 - [i1]Costas Argyrides, Dhiraj K. Pradhan:
Multiple Event Upsets Aware FPGAs Using Protected Schemes. Fault-Tolerant Distributed Algorithms on VLSI Chips 2008 - 2007
- [c8]Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan:
Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories. DFT 2007: 340-348 - [c7]Costas Argyrides, Dhiraj K. Pradhan:
Highly Reliable Power Aware Memory Design. IOLTS 2007: 189-190 - [c6]Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan:
Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs. IPDPS 2007: 1-6 - [c5]Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan:
Multiple Upsets Tolerance in SRAM Memory. ISCAS 2007: 365-368 - [c4]Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan:
CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs. ISCAS 2007: 3696-3699 - [c3]Costas Argyrides, Carlos Arthur Lang Lisbôa, Luigi Carro
A soft error robust and power aware memory design. SBCCI 2007: 300-305 - [c2]Costas Argyrides, Dhiraj K. Pradhan:
Improved decoding algorithm for high reliable reed muller coding. SoCC 2007: 95-98 - [c1]Costas Argyrides, Ahmad A. Al-Yamani, Dhiraj K. Pradhan:
High defect tolerant low cost memory chips. SoCC 2007: 119-122
Coauthor Index
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