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Rui Santos-Tavares
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2020 – today
- 2024
- [j7]Miguel Campilho-Gomes
, Rui Manuel Tavares
Analog Flat-Level Circuit Synthesis With Genetic Algorithms. IEEE Access 12: 115532-115545 (2024) - 2021
- [j6]Leandro Filipe
Voice-Activated Smart Home Controller Using Machine Learning. IEEE Access 9: 66852-66863 (2021) - [j5]Hugo Serra
Transistor-level optimization methodology for the complete design of switched-capacitor filter circuits. Int. J. Circuit Theory Appl. 49(1): 94-113 (2021) - [j4]Miguel Lourenço
An Integrated Decision Support System for Improving Wildfire Suppression Management. ISPRS Int. J. Geo Inf. 10(8): 497 (2021) - 2020
- [c15]Miguel Campilho-Gomes
Automatic Flat-Level Circuit Generation with Genetic Algorithms. DoCEIS 2020: 101-108
2010 – 2019
- 2017
- [j3]Hugo Serra
A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(1): 61-71 (2017) - [j2]Luís Bica Oliveira
Undergraduate Electronics Projects Based on the Design of an Optical Wireless Audio Transmission System. IEEE Trans. Educ. 60(2): 105-111 (2017) - 2015
- [c14]Hugo Serra
Automatic design of high-order SC filter circuits. ISCAS 2015: 1937-1940 - [c13]João P. Alarcão, Luís B. Oliveira, João Pedro Oliveira, Rui Santos-Tavares:
Analysis of a noise canceling LNA using a Si2 OpenAccess based tool - CADIT. MIXDES 2015: 464-469 - 2014
- [c12]Ricardo Povoa
A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. ICECS 2014: 263-266 - [c11]Hugo Serra
A Top-Down Optimization Methodology for SC Filter Circuit Design Using Varying Goal Specifications. DoCEIS 2014: 535-542 - [c10]Hugo Serra
A top-down optimization methodology for SC filter circuit design. ISCAS 2014: 1672-1675 - 2013
- [c9]Somayeh Abdollahvand, Rui Santos-Tavares
A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner. DoCEIS 2013: 611-618 - [c8]Nuno Paulino
The design of an audio power amplifier as a class project for undergraduate students. ISCAS 2013: 2565-2568 - [c7]Rui Santos-Tavares, Edinei Santin, Rui Borrego, João Pedro Oliveira, João Goes:
Gain enhancement and input parasitic capacitance reduction of single-stage OTAs by using differential voltage combiners. MIXDES 2013: 247-250 - [c6]Ricardo Povoa
Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners. VLSI-SoC 2013: 19-22 - 2011
- [j1]Michael Figueiredo, Rui Santos-Tavares
A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(7): 1591-1603 (2011) - 2010
- [c5]Edinei Santin, Michael Figueiredo, Rui Santos-Tavares, João Goes
Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices. ICECS 2010: 25-28 - [c4]Michael Figueiredo, Edinei Santin, João Goes
Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency. ISCAS 2010: 2828-2831
2000 – 2009
- 2008
- [c3]Bruno Esperanca, João Goes
Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC. ISCAS 2008: 220-223 - [c2]Rui Santos-Tavares
Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm. ISCAS 2008: 724-727 - 2006
- [c1]Rui Santos-Tavares
Optimum Sizing and Compensation of Two-Stage CMOS Amplifiers Based On a Time-Domain Approach. ICECS 2006: 533-536
Coauthor Index
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last updated on 2024-10-07 22:07 CEST by the dblp team
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