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Yuji Gendai
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2020 – today
- 2024
- [c7]Shunichi Kubo, Yuji Gendai, Satoshi Miura, Shinsuke Hara, Satoru Tanoi, Akifumi Kasarnatsu, Takeshi Yoshida, Satoshi Tanaka, Shuhei Arnakawa, Minoru Fujishlrna:
A 20Gb/s QPSK Receiver with Mixed-Signal Carrier, Timing, and Data Recovery Using 3-bit ADCs. CICC 2024: 1-2 - 2023
- [c6]Haruo Kobayashi, Manato Hirai, Kakeru Otomo, Shogo Katayama, Xueyan Bai, Masashi Chiba, Zifei Xu, Dan Yao, Lengkhang Nengvang, Minh Tri Tran, Kanji Yoshihiro, Anna Kuwana, Takato Ooide, Hiroshi Tanimoto, Yuji Gendai, Jianglin Wei:
Back to the Analog Neural Network and Linear Circuit Theory. ASICON 2023: 1-4 - 2020
- [c5]Manato Hirai, Hiroshi Tanimoto, Yuji Gendai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi:
Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. ISOCC 2020: 9-10
2010 – 2019
- 2019
- [c4]Manato Hirai, Shuhei Yamamoto, Hirotaka Arai, Anna Kuwana, Hiroshi Tanimoto, Yuji Gendai, Haruo Kobayashi:
Systematic Construction of Resistor Ladder Network for N-ary DACs. ASICON 2019: 1-4 - [c3]Yusuke Asada, Takahiko Shimizu, Yuji Gendai, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jiang-Lin Wei
, Nene Kushita, Hirotaka Arai, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi:
Innovative Test Practices in Japan. VTS 2019: 1 - 2012
- [j2]Yuji Gendai
A Specific Distortion Pattern of Flash ADCs Identified by Discriminating Time-Domain Analysis. IEEE Trans. Instrum. Meas. 61(2): 316-325 (2012) - 2011
- [c2]Takayuki Toyama, Koji Mishina, Koji Tsuchiya, Tatsuya Ichikawa, Hiroyuki Iwaki, Yuji Gendai
A 17.7Mpixel 120fps CMOS image sensor with 34.8Gb/s readout. ISSCC 2011: 420-422 - 2010
- [j1]Yuji Gendai
The Maximum-Likelihood Noise Magnitude Estimation in ADC Linearity Measurements. IEEE Trans. Instrum. Meas. 59(7): 1746-1754 (2010)
1990 – 1999
- 1996
- [c1]T. Murayama, Yuji Gendai
A top down mixed-signal design methodology using a mixed-signal simulator and analog HDL. EURO-DAC 1996: 59-64
Coauthor Index
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