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Ulrich Brüning 0001
Person information
- affiliation: University of Heidelberg, Institute of Computer Engineering, Heidelberg, Germany
- affiliation (PhD 1987): Technical University of Berlin, Germany
Other persons with the same name
- Ulrich Brüning 0002 — TU Berlin, Germany
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2020 – today
- 2021
- [i1]Tobias Thommes, Niels Buwen, Andreas Grübl, Eric Müller, Ulrich Brüning, Johannes Schemmel:
BrainScaleS Large Scale Spike Communication using Extoll. CoRR abs/2111.15296 (2021)
2010 – 2019
- 2019
- [j5]Felix Kaiser, Stefan Kosnac, Ulrich Brüning:
Development of a RISC-V-Conform Fused Multiply-Add Floating-Point Unit. Supercomput. Front. Innov. 6(2): 64-74 (2019) - 2017
- [c32]Sarah Neuwirth
, Feiyi Wang, Sarp Oral
Automatic and Transparent Resource Contention Mitigation for Improving Large-Scale Parallel File System Performance. ICPADS 2017: 604-613 - 2016
- [c31]Juri Schmidt, Holger Fröning, Ulrich Brüning:
Exploring Time and Energy for Complex Accesses to a Hybrid Memory Cube. MEMSYS 2016: 142-150 - [c30]Sarah Neuwirth
Using Balanced Data Placement to Address I/O Contention in Production Environments. SBAC-PAD 2016: 9-17 - 2015
- [c29]Sarah Neuwirth
Scalable communication architecture for network-attached accelerators. HPCA 2015: 627-638 - [c28]Sarah Neuwirth
Communication Models for Distributed Intel Xeon Phi Coprocessors. ICPADS 2015: 499-506 - [c27]Juri Schmidt, Ulrich Brüning:
openHMC - a configurable open-source hybrid memory cube controller. ReConFig 2015: 1-6 - 2013
- [c26]Holger Fröning, Mondrian Nüssle, Heiner Litz, Christian Leber, Ulrich Brüning:
On Achieving High Message Rates. CCGRID 2013: 498-505 - 2012
- [c25]Ulrich Brüning:
MPI Functions and Their Impact on Interconnect Hardware. EuroMPI 2012: 10 - 2011
- [c24]Jesper Larsson Träff, Brice Goglin
Introduction. Euro-Par (2) 2011: 263 - 2010
- [c23]Heiner Litz, Maximilian Thürmer, Ulrich Brüning:
TCCluster: A Cluster Architecture Utilizing the Processor Host Interface as a Network Interconnect. CLUSTER 2010: 9-18 - [c22]José Flich
High Performance Networks. Euro-Par (2) 2010: 412
2000 – 2009
- 2009
- [c21]Heiner Litz, Holger Fröning, Ulrich Brüning:
A HyperTransport 3 Physical Layer Interface for FPGAs. ARC 2009: 4-14 - [c20]Heiner Litz, Holger Fröning, Maximilian Thürmer, Ulrich Brüning:
An FPGA based verification platform for HyperTransport 3.x. FPL 2009: 631-634 - [c19]Holger Fröning, Heiner Litz, Ulrich Brüning:
Efficient Virtualization of High-Performance Network Interfaces. ICN 2009: 434-439 - [c18]Mondrian Nüssle, Martin Scherer, Ulrich Brüning:
A Resource Optimized Remote-Memory-Access Architecture for Low-latency Communication. ICPP 2009: 220-227 - [c17]Mondrian Nüssle, Benjamin Geib, Holger Fröning, Ulrich Brüning:
An FPGA-Based Custom High Performance Interconnection Network. ReConFig 2009: 113-118 - 2008
- [j4]David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning:
An open-source HyperTransport core. ACM Trans. Reconfigurable Technol. Syst. 1(3): 14:1-14:21 (2008) - [c16]Heiner Litz, Holger Fröning, Mondrian Nüssle, Ulrich Brüning:
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers. ICPP 2008: 238-245 - 2007
- [c15]David Slogsnat, Alexander Giese, Ulrich Brüning:
A versatile, low latency HyperTransport core. FPGA 2007: 45-52 - 2005
- [c14]Holger Fröning, Mondrian Nüssle, David Slogsnat, Patrick R. Haspel, Ulrich Brüning:
Performance Evaluation of the ATOLL Interconnect. Parallel and Distributed Computing and Networks 2005: 129-134 - [c13]Mondrian Nüssle, Holger Fröning, Ulrich Brüning:
Swordfish: A Simulator for High-Performance Networks. IASTED PDCS 2005: 530-535 - 2004
- [j3]Andrés Bruhn, Tobias Jakob, Markus Fischer, Timo Kohlberger, Joachim Weickert, Ulrich Brüning, Christoph Schnörr:
High performance cluster computing with 3-D nonlinear diffusion filters. Real Time Imaging 10(1): 41-51 (2004) - [c12]Ulrich Brüning, Wolfgang K. Giloi:
Future Building Blocks for Parallel Architectures. ICPP 2004: 363 - 2003
- [j2]Ulrich Brüning, Ulrich Krackhardt:
Systeme für eine hocheffiziente elektrische und optische Kurzstreckenübertragung im SAN-Bereich (Systems for High-Efficient Electrical and Optical Short-Distance Data Transmission in System-Area-Networks). it Inf. Technol. 45(2): 65-71 (2003) - [c11]David Slogsnat, Markus Fischer, Andrés Bruhn, Joachim Weickert, Ulrich Brüning:
Low Level Parallelization of Nonlinear Diffusion Filtering Algorithms for Cluster Computing Environments. Euro-Par 2003: 481-490 - [c10]Patrick R. Schulz, Ulrich Brüning, Gunter Strube:
SEED2002 Support of Educational course for Electronic Design. MSE 2003: 53-54 - 2002
- [c9]Andrés Bruhn, Tobias Jakob, Markus Fischer, Timo Kohlberger, Joachim Weickert, Ulrich Brüning, Christoph Schnörr:
Designing 3-D Nonlinear Diffusion Filters for High Performance Cluster Computing. DAGM-Symposium 2002: 290-297 - [c8]Ulrich Brüning, Holger Fröning, Patrick R. Schulz, Lars Rzymianowicz:
ATOLL: Performance and Cost Optimization of a San Interconnect. IASTED PDCS 2002: 496-501 - 2000
- [c7]Lars Rzymianowicz, Mathias Waack, Ulrich Brüning, Markus Fischer, Jörg Kluge, Patrick R. Schulz:
Cluster SMP Nodes with the ATOLL Network: A Look into the Future of System Area Networks. HPCN Europe 2000: 678-687 - [c6]Markus Fischer, Ulrich Brüning, Jörg Kluge, Lars Rzymianowicz, Patrick R. Schulz, Mathias Waack:
ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI. IPDPS Workshops 2000: 16-27
1990 – 1999
- 1999
- [j1]Ulrich Brüning:
Trends und Entwicklungen der Kommunikationstechnik für den Aufbau von Rechnerclustern. Prax. Inf.verarb. Kommun. 22(4): 221-225 (1999) - [c5]Lars Rzymianowicz, Ulrich Brüning, Jörg Kluge, Patrick R. Schulz, Mathias Waack:
ATOLL: A Network on a Chip. PDPTA 1999: 2307-2313 - 1997
- [c4]Ulrich Brüning, Lambert Schaelicke:
ATOLL: A High-Performance Communication Device for Massively Parallel Systems. APDC 1997: 228-234 - 1996
- [c3]Wolfgang K. Giloi, Ulrich Brüning, Wolfgang Schröder-Preikschat:
MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance. PDP 1996: 297-304 - 1994
- [c2]Ulrich Brüning, Wolfgang K. Giloi, Wolfgang Schröder-Preikschat:
Latency Hiding in Message-Passing Architectures. IPPS 1994: 704-709 - 1991
- [c1]Ulrich Brüning, Wolfgang K. Giloi, Wolfgang Schröder-Preikschat:
The Architecture of the European MIMD Supercomputer GENESIS. EDMCC 1991: 450-462
1980 – 1989
- 1987
- [b1]Ulrich Brüning:
Realisierungsprinzipien von Mikrorechnern hoher numerischer Leistung. Technical University of Berlin, Germany, 1987, pp. 1-20
Coauthor Index
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