Logic emulators in digital systems education - Andrej Trost; Baldomir Zajc (Proceedings of EUROCON 2011, International Conference on Computer as a Tool, 27-29 April 2011, Lisbon, Portugal, 2011)

Test generation for technology-specific multi-faults based on detectable perturbations - Andrej Zemva; Baldomir Zajc (Microelectron. Reliab., 2005)

Optimization of FPGA configurations using parallel genetic algorithm - Hubert Fröhlich; Andrej Koir; Baldomir Zajc (Inf. Sci., 2001)

Educational Programmable Hardware Prototyping and Verification System - Andrej Trost; Andrej Zemva; Baldomir Zajc (Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, 2000)

Programmabel Prototyping System for Image Processing - Andrej Trost; Andrej Zemva; Baldomir Zajc (Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings, 1998)

An Experimental Programmable Environment for Prototyping Digital Circuits - Andrej Trost; Roman Kuznar; Andrej Zemva; Baldomir Zajc (Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, 6th International Workshop on Field-Programmable Logic, FPL '96, Darmstadt, Germany, September 23-25, 1996, Proceedings, 1996)

Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and Interconnect - Roman Kuznar; Franc Brglez; Baldomir Zajc (Proceedings of the 31st Conference on Design Automation, San Diego, California, USA, June 6-10, 1994, 1994)

A Functionality Fault Model: Feasibility and Applications - Andrej Zemva; Franc Brglez; Krzysztof Kozminski; Baldomir Zajc (EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28 - March 3, 1994, Paris, France, 1994)

A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions - Roman Kuznar; Baldomir Zajc; Franc Brglez (Proceedings EURO-DAC'94, European Design Automation Conference, Grenoble, France, September 19-22, 1994, 1994)