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Hana Kubátová
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- affiliation: Czech Technical University in Prague, Department of Digital Design, Czech Republic
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2020 – today
- 2024
- [c57]Jakub Zahradnik, Martin Danhel, Hana Kubátová:
Integration of PXROS-HR with Micro-ROS in Robotic Systems. MECO 2024: 1-6 - 2023
- [e4]Maksim Jenihhin, Hana Kubátová, Nele Metens, Jaan Raik, Foisal Ahmed, Jan Belohoubek:
26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2023, Tallinn, Estonia, May 3-5, 2023. IEEE 2023, ISBN 979-8-3503-3277-3 [contents] - 2022
- [c56]Jan Reznícek, Martin Kohlík, Hana Kubátová:
Verification of Calculations of Non-Homogeneous Markov Chains Using Monte Carlo Simulation. DSD 2022: 689-695 - 2021
- [c55]Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Secure and dependable: Area-efficient masked and fault-tolerant architectures. DSD 2021: 333-338 - 2020
- [j11]Jan Reznícek, Martin Kohlík, Hana Kubátová:
Non-homogeneous hierarchical Continuous Time Markov Chains. Microprocess. Microsystems 78: 103206 (2020) - [c54]Jan Reznícek, Martin Kohlík, Hana Kubátová:
Non-Homogeneous Continuous Time Markov Chains Calculations. DSD 2020: 664-671 - [c53]Karel Hynek, Tomás Cejka
, Martin Zádník, Hana Kubátová:
Evaluating Bad Hosts Using Adaptive Blacklist Filter. MECO 2020: 1-5 - [c52]Vojtech Procházka, Pavel Kubalík, Hana Kubátová:
Low Power Wireless Data Transfer for Internet of Things: GSM Network Measuring Results. MECO 2020: 1-5 - [c51]Karel Hynek, Tomás Benes, Tomás Cejka
Refined Detection of SSH Brute-Force Attackers Using Machine Learning. SEC 2020: 49-63
2010 – 2019
- 2019
- [j10]Petr Socha
Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative. Microprocess. Microsystems 71 (2019) - [c50]Jan Reznícek, Martin Kohlík, Hana Kubátová:
Accurate Inexact Calculations of Non-Homogeneous Markov Chains. DSD 2019: 470-477 - [c49]Jan Reznícek, Martin Kohlík, Hana Kubátová:
Hierarchical Dependability Models based on Non-Homogeneous Continuous Time Markov Chains. DTIS 2019: 1-2 - [c48]Hana Kubátová:
Dependability Problems in Interconnected World. MECO 2019: 1 - 2018
- [j9]Pavel Benácek, Viktor Pus, Hana Kubátová, Tomás Cejka
P4-To-VHDL: Automatic generation of high-speed input and output network blocks. Microprocess. Microsystems 56: 22-33 (2018) - [c47]Petr Socha
Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative. DSD 2018: 565-568 - [c46]Vojtech Miskovský
Speeding up differential power analysis using integrated power traces. MECO 2018: 1-5 - 2017
- [j8]Vojtech Miskovský
Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA. Microprocess. Microsystems 51: 220-226 (2017) - [j7]Jaroslav Borecký, Martin Kohlík, Hana Kubátová:
Parity driven reconfigurable duplex system. Microprocess. Microsystems 52: 251-260 (2017) - [j6]Martin Danhel, Filip Stepánek, Hana Kubátová:
The effect of the transient faults in dependability prediction. Microprocess. Microsystems 52: 498-504 (2017) - [c45]Petr Socha
Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches. DDECS 2017: 184-189 - [c44]Jan Riha, Vojtech Miskovský
Influence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design. DSD 2017: 260-267 - [c43]Martin Danhel, Filip Stepánek, Hana Kubátová:
Dependability Prediction Involving Temporal Redundancy and the Effect of Transient Faults. DSD 2017: 360-363 - [c42]Martin Danhel, Hana Kubátová:
Dependability or reliability in the real world history, terminology, prediction. MECO 2017: 1-4 - [c41]Petr Novák
Predicting the Life Expectancy of Railway Fail-Safe Signaling Systems Using Dynamic Models with Censoring. QRS 2017: 329-339 - [e3]Hana Kubátová, Martin Novotný, Amund Skavhaug:
Euromicro Conference on Digital System Design, DSD 2017, Vienna, Austria, August 30 - Sept. 1, 2017. IEEE Computer Society 2017, ISBN 978-1-5386-2146-2 [contents] - 2016
- [c40]Tomás Cejka
NEMEA: A framework for network traffic analysis. CNSM 2016: 195-201 - [c39]Jaroslav Borecký, Martin Kohlík, Hana Kubátová:
Parity Waterfall method. DDECS 2016: 21-26 - [c38]Tomas Vanat
Comparing proton and neutron induced SEU cross section in FPGA. DDECS 2016: 214-217 - [c37]Martin Danhel, Filip Stepánek, Hana Kubátová:
The Effect of the Transient Faults in Dependability Prediction. DSD 2016: 9-13 - [c36]Jaroslav Borecký, Martin Kohlík, Pavel Vit, Hana Kubátová:
Enhanced Duplication Method with TMR-Like Masking Abilities. DSD 2016: 690-693 - [c35]Pavel Benácek, Viktor Pus, Hana Kubátová:
P4-to-VHDL: Automatic Generation of 100 Gbps Packet Parsers. FCCM 2016: 148-155 - [c34]Vojtech Miskovský
Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges. MECO 2016: 14-17 - [c33]Hana Kubátová, Martin Novotný
Education of Computer Engineering at CTU in Prague. MECO 2016: 22-25 - [c32]Matej Bartík
Hardware-software co-design: A practical course for future embedded engineers. MECO 2016: 347-350 - 2015
- [c31]Tomás Cejka
Using Application-Aware Flow Monitoring for SIP Fraud Detection. AIMS 2015: 87-99 - [c30]Tomas Vanat
A System for Radiation Testing and Physical Fault Injection into the FPGAs and Other Electronics. DSD 2015: 205-210 - 2014
- [c29]Pavel Benácek, Rudolf B. Blazek, Tomás Cejka
Change-point detection method on 100 Gb/s ethernet interface. ANCS 2014: 245-246 - [c28]Tomás Cejka
Stream-wise detection of surreptitious traffic over DNS. CAMAD 2014: 300-304 - [c27]Pavel Vit, Jaroslav Borecký, Martin Kohlík, Hana Kubátová:
Fault Tolerant Duplex System with High Availability for Practical Applications. DSD 2014: 320-325 - [c26]Pavel Benácek, Hana Kubátová, Viktor Pus:
Architecture of Effective High-Speed Network Stream Merger. DSD 2014: 459-464 - 2013
- [j5]Hana Kubátová, Paris Kitsos
Editorial of special issue: Digital System Safety and Security. Microprocess. Microsystems 37(2): 113-114 (2013) - [c25]Martin Kohlík, Hana Kubátová:
Hierarchical Dependability Models Based on Markov Chains. ARCS Workshops 2013 - [c24]Tomas Vanat, Hana Kubátová:
System for Radiation Testing of FPGAs. ARCS Workshops 2013 - [c23]Martin Danhel, Hana Kubátová, Radek Dobias:
Predictive Analysis of Mission Critical Systems Dependability. DSD 2013: 561-566 - [c22]Martin Kohlík, Hana Kubátová:
Markov chains hierarchical dependability models: Worst-case computations. LATW 2013: 1-6 - [e2]Hana Kubátová, Christian Hochberger, Martin Danek, Bernhard Sick:
Architecture of Computing Systems - ARCS 2013 - 26th International Conference, Prague, Czech Republic, February 19-22, 2013. Proceedings. Lecture Notes in Computer Science 7767, Springer 2013, ISBN 978-3-642-36423-5 [contents] - 2012
- [c21]Martin Kohlík, Hana Kubátová:
Reduction of complex safety models based on Markov chains. DDECS 2012: 183-186 - [c20]Martin Kohlík, Jaroslav Borecký, Hana Kubátová:
Miscellaneous Types of Partial Duplication Modifications for Availability Improvements. DSD 2012: 79-83 - 2011
- [c19]Jaroslav Borecký, Martin Kohlík, Pavel Kubalík, Hana Kubátová:
Fault Models Usability Study for On-line Tested FPGA. DSD 2011: 287-290 - 2010
- [c18]Jaroslav Borecký, Martin Kohlík, Hana Kubátová, Pavel Kubalík:
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication. DSD 2010: 380-386
2000 – 2009
- 2009
- [c17]Jaroslav Borecký, Pavel Kubalík, Hana Kubátová:
Reliable Railway Station System Based on Regular Structure Implemented in FPGA. DSD 2009: 348-354 - 2008
- [j4]Pavel Kubalík, Hana Kubátová:
Dependable design technique for system-on-chip. J. Syst. Archit. 54(3-4): 452-464 (2008) - [j3]Hana Kubátová:
Dependability and testing of modern digital systems. Microprocess. Microsystems 32(5-6): 243 (2008) - [j2]Petr Fiser
Column-matching based mixed-mode test pattern generator design technique for BIST. Microprocess. Microsystems 32(5-6): 340-350 (2008) - [c16]Petr Fiser
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA. DSD 2008: 96-99 - [c15]Jirí Kvasnicka, Pavel Kubalík, Hana Kubátová:
Experimental SEU Impact on Digital Design Implemented in FPGAs. DSD 2008: 100-103 - [c14]Radek Dobias, Jan Konarski, Hana Kubátová:
Dependability Evaluation of Real Railway Interlocking Device. DSD 2008: 228-233 - 2007
- [c13]Pavel Kubalík, Jirí Kvasnicka, Hana Kubátová:
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System. DDECS 2007: 357-360 - 2006
- [j1]Subhasish Mitra, Ondrej Novák, Hana Kubátová, Bashir M. Al-Hashimi, Erik Jan Marinissen, C. P. Ravikumar:
Conference Reports. IEEE Des. Test Comput. 23(4): 262-265 (2006) - [c12]Pavel Kubalík, Radek Dobias, Hana Kubátová:
Dependability Computation for Fault Tolerant Reconfigurable Duplex System. DDECS 2006: 100-102 - [c11]Petr Fiser, Hana Kubátová:
Multiple-Vector Column-Matching BIST Design Method. DDECS 2006: 268-273 - [c10]Pavel Kubalík, Radek Dobias, Hana Kubátová:
Dependable Design for FPGA Based on Duplex System and Reconfiguration. DSD 2006: 139-145 - [c9]Petr Fiser, Hana Kubátová:
Flexible Two-Level Boolean Minimizer BOOM-II and Its Applications. DSD 2006: 369-376 - [c8]Pavel Kubalík, Petr Fiser, Hana Kubátová:
Fault Tolerant System Design Method Based on Self-Checking Circuits. IOLTS 2006: 185-186 - [e1]Matteo Sonza Reorda, Ondrej Novák, Bernd Straube, Hana Kubátová, Zdenek Kotásek, Pavel Kubalík, Raimund Ubar, Jirí Bucek:
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), Prague, Czech Republic, April 18-21, 2006. IEEE Computer Society 2006, ISBN 1-4244-0185-2 [contents] - 2005
- [c7]Peter Filter, Hana Kubátová:
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST. DSD 2005: 56-63 - [c6]Radek Dobias, Pavel Kubalík, Hana Kubátová:
Dependability computations for fault-tolerant system based on FPGA. ICECS 2005: 1-4 - 2004
- [c5]Petr Fiser, Hana Kubátová:
Boolean Minimizer FC-Min: Coverage Finding Process. DSD 2004: 152-159 - [c4]Radek Dobias, Hana Kubátová:
FPGA Based Design of the Railway's Interlocking Equipments. DSD 2004: 467-473 - [c3]Petr Fiser, Hana Kubátová:
Survey of the Algorithms in the Column-Matching BIST Method. IOLTS 2004: 181 - 2003
- [c2]Petr Fiser
FC-Min: A Fast Multi-Output Boolean Minimizer. DSD 2003: 451-454 - 2002
- [c1]Hana Kubátová, Radek Jelinek:
Digital testing and reliability education (DTRE) computer tool. ICECS 2002: 1227-1230
Coauthor Index
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last updated on 2024-10-07 22:18 CEST by the dblp team
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