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Hyung-Rok Lee
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2010 – 2019
- 2011
- [j2]Sang-Yoon Lee, Hyung-Rok Lee, Young-Ho Kwak, Woo-Seok Choi, Byoung-Joo Yoo, Daeyun Shim, Chulwoo Kim, Deog-Kyoon Jeong:
250 Mbps-5 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 μ m CMOS. IEEE J. Solid State Circuits 46(11): 2560-2570 (2011)
2000 – 2009
- 2006
- [c2]Hyung-Rok Lee, Ook Kim, Keewook Jung, John Shin, Deog-Kyoon Jeong:
A PVT-Tolerant Low-1/f Noise Dual-Loop Hybrid PLL in 0.18µm. ISSCC 2006: 2402-2411 - 2005
- [j1]Hyung-Rok Lee, Moon-Sang Hwang, Bong-Joon Lee, Young-Deok Kim, Dohwan Oh, Jaeha Kim, Sang-Hyun Lee, Deog-Kyoon Jeong, Wonchan Kim:
A 1.2-V-only 900-mW 10 gb ethernet transceiver and XAUI interface with robust VCO tuning technique. IEEE J. Solid State Circuits 40(11): 2148-2158 (2005)
1990 – 1999
- 1998
- [c1]Yeshik Shin, Jin-su Ahn, Hyung-Rok Lee, Deog-Kyoon Jeong:
Design and Implementation of OTCA MAC Protocol for High-Speed Point-to-Point Ring Network. LCN 1998: 345-352
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