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Enver Cavus
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2020 – today
- 2024
- [c16]Adem Çiçek, Ian D. Marsland, Enver Cavus, Ebrahim Bedeer, Halim Yanikomeroglu:
Low Complexity Lookup Table Aided Soft Output Semidefinite Relaxation Based Faster-than-Nyquist Signaling Detector. ICC 2024: 1267-1272 - 2023
- [j7]Adem Çiçek
, Enver Cavus
Coordinate Interleaved Faster-Than-Nyquist Signaling. IEEE Commun. Lett. 27(1): 229-233 (2023) - 2022
- [j6]Mehmet Ali Gulden
Self calibrated cooler-less microbolometer readout architecture. Integr. 82: 14-19 (2022) - [i2]Adem Çiçek, Enver Cavus, Ebrahim Bedeer
Coordinate Interleaved Faster-than-Nyquist Signaling. CoRR abs/2210.01786 (2022) - 2021
- [c15]Mustafa Öztürk, Enver Çavus:
Vehicle Detection in Aerial Imaginary using a Miniature CNN Architecture. INISTA 2021: 1-6 - [c14]Emre Cerci, Adem Çiçek, Enver Cavus, Ebrahim Bedeer
Coded Faster-than-Nyquist Signaling for Short Packet Communications. PIMRC 2021: 428-433 - [i1]Emre Cerci
Coded Faster-than-Nyquist Signaling for Short Packet Communications. CoRR abs/2106.10574 (2021) - 2020
- [j5]Mustafa Anil Resat
Analysis and FPGA Implementation of Zero-Forcing Receive Beamforming with Signal Space Diversity under Different Interleaving Techniques. J. Circuits Syst. Comput. 29(1): 2050007:1-2050007:19 (2020) - [j4]Mehmet Ali Gulden
A Novel Current-Controlled Oscillator-Based Low-Supply-Voltage Microbolometer Readout Architecture. J. Circuits Syst. Comput. 29(10): 2050169:1-2050169:15 (2020) - [j3]Serdar Özyurt, Mustafa Öztürk, Enver Çavus:
Low-Complexity MIMO MMSE Receiver with Performance Enhancement via Coordinate Interleaving. J. Circuits Syst. Comput. 29(14): 2050231:1-2050231:14 (2020) - [c13]Abdulsamet Caglan, Adem Çiçek, Enver Cavus
Polar Coded Faster-than-Nyquist (FTN) Signaling with Symbol-by-Symbol Detection. WCNC 2020: 1-5
2010 – 2019
- 2019
- [c12]Murat Can Karakoç, Muhammet Fatih Sertkaya, Emre Kirkaya, Enver Çavus
FPGA Implementation of Synchronization Techniques used in OFDM Systems. SIU 2019: 1-4 - 2018
- [c11]Murat Can Karakoc, Emre Kirkaya, Özgün Ersoy, Mahir Sanli, Adem Çiçek, Enver Cavus
FPGA implementation of symbol timing synchronization for OFDM systems. SIU 2018: 1-4 - [c10]Mustafa Öztürk, Emre Kirkaya, Ersen Balcisoy, Mahir Sanli, Adem Çiçek, Enver Cavus
Baseband implementation of high speed communication system on FPGA. SIU 2018: 1-4 - [c9]Mahir Sanli, Mustafa Öztürk, Ersen Balcisoy, Murat Can Karakoc, Emre Kirkaya, Adem Çiçek, Serdar Ozyurt, Enver Cavus
FPGA implementation of MMSE channel estimation algorithm using system generator. SIU 2018: 1-4 - 2017
- [c8]Abdulsamet Caglan, Ersen Balcisoy, Emre Kirkaya, Gurbannazar Charyyev, Adem Çiçek, Enver Cavus
FPGA implementation of layered low density parity check error correction codes. SIU 2017: 1-4 - [c7]Özgün Ersoy, A. Behzat Gahin, Adem Çiçek, M. Can Karakoc, Enver Cavus
Design of frequency upconversion and downconversion blocks for 240 GHz communication systems. SIU 2017: 1-4 - 2016
- [c6]Murat Sever, Enver Cavus
Parallelizing LDPC Decoding Using OpenMP on Multicore Digital Signal Processors. ICPP Workshops 2016: 46-51 - [c5]Abdulsamet Caglan, Erkan Inceoz, Ersen Balcisoy, Mehmet Efe Özbek, Enver Cavus
FPGA implementation of AWGN noise generator using Box-Muller method. SIU 2016: 1813-1816 - 2015
- [c4]Ahmet Turan Erozan, Enver Çavus:
An EG-LDPC Based 2-Dimensional Error Correcting Code for Mitigating MBUs of SRAM Memories. FPGAworld 2015: 21-26
2000 – 2009
- 2009
- [j2]Enver Cavus
Low BER performance estimation of LDPC codes via application of importance sampling to trapping sets. IEEE Trans. Commun. 57(7): 1886-1888 (2009) - 2006
- [j1]Enver Cavus
A very low-complexity space-time block decoder (STBD) ASIC for wireless systems. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(1): 60-69 (2006) - [c3]Enver Cavus
An IS Simulation Technique for Very Low BER Performance Evaluation of LDPC Codes. ICC 2006: 1095-1100 - 2005
- [c2]Enver Cavus, Babak Daneshrad:
A performance improvement and error floor avoidance technique for belief propagation decoding of LDPC codes. PIMRC 2005: 2386-2390 - 2001
- [c1]Enver Cavus
A computationally efficient algorithm for space-time block decoding. ICC 2001: 1157-1162
Coauthor Index
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last updated on 2024-09-04 01:20 CEST by the dblp team
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