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Alexander Sudnitson
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2010 – 2019
- 2017
- [c25]Iouliia Skliarova
, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
Reconfigurable systems in engineering education: Best practices and future trends. EDUCON 2017: 1084-1088 - [c24]Artjem Rjabov, Valery Sklyarov, Iouliia Skliarova
RAM-based mergers for data sort and frequent item computation. MIPRO 2017: 176-181 - 2016
- [j3]Valery Sklyarov, Iouliia Skliarova
Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems. Int. J. Comput. Commun. Control 11(1): 126-141 (2016) - 2015
- [c23]Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, Alexander Sudnitson:
Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip. DSD 2015: 345-352 - [c22]Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, Margus Kruus
FPGA-based time and cost effective Hamming weight comparators for binary vectors. EUROCON 2015: 1-6 - [c21]Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
Integration of high-level synthesis to the courses on reconfigurable digital systems. MIPRO 2015: 166-171 - 2014
- [j2]Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson:
FPGA-based Accelerators for Parallel Data Sort. Appl. Comput. Syst. 16(1): 53 (2014) - [c20]Valery Sklyarov
Design space exploration in multi-level computing systems. CompSysTech 2014: 40-47 - [c19]Iouliia Skliarova
Teaching FPGA-based systems. EDUCON 2014: 460-469 - 2013
- [c18]Dmitri Mihhailov, Artjem Rjabov, Valery Sklyarov
Optimization of address-based data sorting unit with external memory support. CompSysTech 2013: 83-90 - [c17]Valery Sklyarov
Address-based data processing over N-ary trees. EUROCON 2013: 1790-1797 - [c16]Dmitri Mihhailov, Alexander Sudnitson, Valery Sklyarov
Implementation of address-based data sorting on different FPGA platforms. EWDTS 2013: 1-4 - [c15]Valery Sklyarov
Implementation of parallel operations over streams in extensible processing platforms. MWSCAS 2013: 852-855 - 2012
- [c14]Valery Sklyarov
Methodology and international collaboration in teaching reconfigurable systems. EDUCON 2012: 1-10 - [c13]Valery Sklyarov
Performance evaluation for FPGA-based processing of tree-like structures. ICECS 2012: 217-220 - 2011
- [j1]Assim Sagahyroon, Fadi A. Aloul, Alexander Sudnitson:
Using SAT-Based Techniques in Low Power State Assignment. J. Circuits Syst. Comput. 20(8): 1605-1618 (2011) - [c12]Dmitri Mihhailov, Margus Kruus
Recursion and hierarchy in digital design and prototyping: a case study. CompSysTech 2011: 45-50 - [c11]Valery Sklyarov
High-performance hardware accelerators for sorting and managing priorities. DDECS 2011: 313-318 - [c10]Valery Sklyarov
Implementation in FPGA of Address-Based Data Sorting. FPL 2011: 405-410 - 2010
- [c9]Alexander Sudnitson, Dmitri Mihhailov, Margus Kruus
Advanced topics of FSM design using FPGA educational boards and web-based tools. EWDTS 2010: 514-517 - [c8]Dmitri Mihhailov, Valery Sklyarov
Application-specific hardware accelerator for implementing recursive sorting algorithms. FPT 2010: 269-272 - [c7]Dmitri Mihhailov, Valery Sklyarov
Parallel FPGA-Based Implementation of Recursive Sorting Algorithms. ReConFig 2010: 121-126 - [c6]Valery Sklyarov
Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. ReConFig 2010: 436-441
2000 – 2009
- 2009
- [c5]Alexander Sudnitson, Dmitri Mihhailov, Margus Kruus
FSM decomposition with application to FPGA synthesis. CompSysTech 2009: 74 - 2008
- [c4]Dmitri Mihhailov, Margus Kruus
FPGA platform based digital design education. CompSysTech 2008: 53 - 2004
- [c3]Artur Jutman, Alexander Sudnitson, Raimund Ubar, Heinz-Dietrich Wuttke:
Asynchronous e-learning resources for hardware design issues. CompSysTech 2004: 1-6 - 2003
- [c2]Elena Fomina, Andres Keevallik, Margus Kruus, Alexander Sudnitson:
A decomposition procedure for register-transfer level power management. CompSysTech 2003: 26-31 - 2002
- [c1]Alexander Sudnitson:
Computational kernel extraction for synthesis of power-managed sequential components. ICECS 2002: 749-752
Coauthor Index
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