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Hidenori Okuni
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2020 – today
- 2021
- [c10]Kentaro Yoshioka
, Hidenori Okuni, Tuan Thanh Ta, Akihide Sai:
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections. IROS 2021: 1578-1584 - [i1]Kentaro Yoshioka, Hidenori Okuni, Tuan Thanh Ta, Akihide Sai:
Through the Looking Glass: Diminishing Occlusions in Robot Vision Systems with Mirror Reflections. CoRR abs/2108.13599 (2021) - 2020
- [j5]Satoshi Kondo
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm2 Voltage/Time Dual-Data-Converter-Based AFE. IEEE J. Solid State Circuits 55(11): 2866-2877 (2020) - [c9]Satoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka
5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm2 Voltage/Time Dual-Data-Converter-Based AFE. ISSCC 2020: 94-96 - [c8]Tuan Thanh Ta, Hiroshi Kubota, Koichi Kokubun, Toshiki Sugimoto, Masatoshi Hirono, Mitsuhiro Sengoku, Hisaaki Katagiri, Hidenori Okuni, Satoshi Kondo, Shinichi Ohtsuka, Honam Kwon, Keita Sasaki, Yutaka Ota, Kazuhiro Suzuki, Katsuyuki Kimura, Kentaro Yoshioka
A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR. VLSI Circuits 2020: 1-2
2010 – 2019
- 2018
- [j4]Kentaro Yoshioka
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. IEEE J. Solid State Circuits 53(11): 3026-3038 (2018) - [c7]Kentaro Yoshioka
A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique. ISSCC 2018: 92-94 - 2016
- [j3]Akihide Sai
A 5.5 mW ADPLL-Based Receiver With a Hybrid Loop Interference Rejection for BLE Application in 65 nm CMOS. IEEE J. Solid State Circuits 51(12): 3125-3136 (2016) - [c6]Akihide Sai, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Masanori Furuta, Tetsuro Itakura:
19.7 A 65nm CMOS ADPLL with 360µW 1.6ps-INL SS-ADC-based period-detection-free TDC. ISSCC 2016: 336-337 - [c5]Hidenori Okuni, Akihide Sai, Tuan Thanh Ta, Satoshi Kondo, Takashi Tokairin, Masanori Furuta, Tetsuro Itakura:
26.1 A 5.5mW ADPLL-based receiver with hybrid-loop interference rejection for BLE application in 65nm CMOS. ISSCC 2016: 436-437 - 2015
- [j2]Masanori Furuta, Hidenori Okuni, Masahiro Hosoya, Akihide Sai, Junya Matsuno, Shigehito Saigusa, Tetsuro Itakura:
A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(2): 492-499 (2015) - 2014
- [c4]Shigehito Saigusa, Toshiya Mitomo, Hidenori Okuni, Masahiro Hosoya, Akihide Sai, Shusuke Kawai, Tong Wang, Masanori Furuta, Kei Shiraishi, Koichiro Ban, Seiichiro Horikawa, Tomoya Tandai, Ryoko Matsuo, Takeshi Tomizawa, Hiroaki Hoshino, Junya Matsuno, Yukako Tsutsumi, Ryoichi Tachibana, Osamu Watanabe, Tetsuro Itakura:
20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. ISSCC 2014: 348-349 - 2011
- [j1]Fumi Moritsuka, Hidenori Okuni, Toshiyuki Umeda:
950 MHz, -60 dB TX-Cancellation Active Directional Couplers for UHF RFID Application. IEICE Trans. Electron. 94-C(10): 1539-1547 (2011)
2000 – 2009
- 2008
- [c3]Hiroshi Yoshida, Takehiko Toyoda, T. Yasuda, Yosuke Ogasawara, M. Ishii, T. Murasaki, Gaku Takemura, Masaomi Iwanaga, T. Takida, Yuta Araki, T. Hashimoto, K. Sami, Teruo Imayama, H. Shimizu, Hideyuki Kokatsu, Y. Tsuda, I. Tamura, H. Masuoka, Masahiro Hosoya, R. Ito, Hidenori Okuni, T. Kato, K. Sato, K. Nonin, K. Osawa, R. Fujimoto, S. Kawaguchi, Hiroshi Tsurumi, N. Itoh:
A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interface. ESSCIRC 2008: 142-145 - 2007
- [c2]Hidenori Okuni, Rui Ito, Hiroshi Yoshida, Tetsuro Itakura:
A Direct Conversion Receiver with Fast-Settling DC Offset Canceller. PIMRC 2007: 1-5 - 2006
- [c1]Takafumi Yamaji, Tetsuro Itakura, Rui Ito, Takeshi Ueno, Hidenori Okuni:
Balanced 3-phase analog signal processing for radio communications. ISCAS 2006
Coauthor Index
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