default search action
Jiaxin Liu 0001
Person information
- affiliation: University of Electronic Science And Technology of China, School of Integrated Circuit Science and Engineering, Chengdu, China
- affiliation: Tsinghua University, Department of Electrical Engineering, Beijing, China
- affiliation (PhD 2018): University of Electronic Science and Technology of China (UESTC), Chengdu, China
- affiliation (2015 - 2017): University of Texas at Austin, Department of Electrical and Computer Engineering, Austin, TX, USA
Other persons with the same name
- Jiaxin Liu (aka: Jia-xin Liu, Jia-Xin Liu) — disambiguation page
- Jiaxin Liu 0002 — University of Illinois at Urbana-Champaign, School of Computing and Data Science, Urbana, IL, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2025
- [j18]Jingrun Song, Xinyu Yang, Jiaxu Liu, Yueduo Liu, Zihao Zhu, Zhengxuan Han, Zehao Zhang, Jiaxin Liu, Hongshuai Zhang, Jun Yin, Pui-In Mak, Shiheng Yang:
Analyses Concerning the Phase Noise and Nonlinear Behavior of the Charge-Sharing Integrator-Based Hybrid PLL. IEEE Trans. Circuits Syst. I Regul. Pap. 72(7): 3149-3162 (2025) - [j17]Xuanhao Zhang
, Jialin Hu, Xingshuai Zou
A 5-MS/s 93.4-dB-DR Three-Step Incremental Zoom ADC With Single Sampling. IEEE Trans. Circuits Syst. I Regul. Pap. 72(10): 5399-5408 (2025) - [c19]Yueduo Liu, Zihao Zhu, Xinyu Yang, Rongxin Bao, Zehao Zhang, Hongshuai Zhang, Jiaxin Liu, Zheng Wang, Mingkang Zhang, Na Yan, Jun Yin, Pui-In Mak, Shiheng Yang:
A 0.4μW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°C. ISSCC 2025: 84-86 - [c18]Han Zhao, Xuanhao Zhang, Qijin Deng, Jialin Hu, Zhenbing Li, Shiheng Yang, Jiaxin Liu:
18.1 A Fully Dynamic Noise-Shaping SAR ADC Achieving 120dB SNDR and 189dB FoMs in 1kHz BW. ISSCC 2025: 306-308 - 2024
- [j16]Jinshan Yue
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits 59(5): 1612-1627 (2024) - [j15]Chang Liu
Mitigating Sampling Noise for Energy-Efficient ADCs: A Tutorial Brief. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1638-1643 (2024) - [c17]Tiange Yi, Zhenbing Li, Bing Du, Shiheng Yang, Jiaxin Liu:
A Noise Shaping SAR ADC with kT/C Noise Cancellation and Mismatch Error Shaping. ICTA 2024: 226-227 - 2023
- [j14]Xiyuan Tang
A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier. IEEE J. Solid State Circuits 58(9): 2564-2574 (2023) - [j13]Yiming Chen
SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity- Compensated Fully Parallel Analog Adder Tree. IEEE Trans. Circuits Syst. I Regul. Pap. 70(7): 2762-2773 (2023) - [j12]Zehao Zhang, Shiheng Yang
On the DC-Settling Process of the Pierce Crystal Oscillator in Start-Up. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 26-30 (2023) - 2022
- [j11]Xiyuan Tang
Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. 69(6): 2249-2262 (2022) - [c16]Mingkang Zhang, Zihao Zhu, Yueduo Liu, Zehao Zhang, Rongxin Bao, Jiahui Lin, Haovu Zhuang, Jiaxin Liu, Xiong Zhou, Shiheng Yang, Qiang Li:
A 4.2-to-5.6 GHz Transformer-Based PMOS-only Stacked-gm VCO in 28-nm CMOS. ICTA 2022: 36-37 - [i1]Guodong Yin, Mufeng Zhou, Yiming Chen, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, Xueqing Li:
A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface. CoRR abs/2212.04320 (2022) - 2021
- [j10]Chen-Kai Hsu
A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping. IEEE J. Solid State Circuits 56(3): 739-749 (2021) - [j9]Haoyu Zhuang
A Fully Dynamic Low-Power Wideband Time-Interleaved Noise-Shaping SAR ADC. IEEE J. Solid State Circuits 56(9): 2680-2690 (2021) - [j8]Jiaxin Liu
A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping. IEEE J. Solid State Circuits 56(11): 3412-3423 (2021) - [c15]Xiaodan Zhou, Zehao Li, Yujie Wang, Xiong Zhou, Shiheng Yang, Jiaxin Liu, Qiang Li:
A Low Power Sample-and-Hold Circuit with Improved Dynamic Bias for Pipelined ADC. APCCAS 2021: 189-192 - [c14]Yan Zeng, Shiheng Yang, Yueduo Liu, Zehao Li, Wengang Huang, Xiaozong Huang, Xiong Zhou, Jiaxin Liu, Qiang Li:
A 640×512 30μm Pixel Pitch 1.8mK-NETD 90.1dB-SNR Digital Read-out Integrated Circuit with Fully On-chip Image Algorithm Pixel-Level Calibration. A-SSCC 2021: 1-3 - [c13]Yi Zhong
An 81.5dB-DR 1.25MHz-BW VCO-Based CT ΔΣ ADC with Double-PFD Quantizer. CICC 2021: 1-2 - [c12]Yueduo Liu, Zihao Zhu, Rongxin Bao, Shiheng Yang, Jiaxin Liu, Xiong Zhou, Qiang Li:
A Low-Power RC Oscillator with Offset and Path Delay Cancellation. ICTA 2021: 12-13 - [c11]Wei Shi, Jiaxin Liu, Abhishek Mukherjee, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Nan Sun:
10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR. ISSCC 2021: 170-172 - [c10]Jinshan Yue, Xiaoyu Feng, Yifan He, Yuxuan Huang
A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating. ISSCC 2021: 238-240 - [c9]Jiaxin Liu, Dengquan Li, Yi Zhong
27.1 A 250kHz-BW 93dB-SNDR 4th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering. ISSCC 2021: 369-371 - [c8]Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Wei Shi, David Z. Pan, Nan Sun:
A 0.4-to-40MS/s 75.7dB-SNDR Fully Dynamic Event-Driven Pipelined ADC with 3-Stage Cascoded Floating Inverter Amplifier. ISSCC 2021: 376-378 - 2020
- [j7]Dengquan Li
A 7-bit 900-MS/s 2-Then-3-bit/cycle SAR ADC With Background Offset Calibration. IEEE J. Solid State Circuits 55(11): 3051-3063 (2020) - [j6]Xiyuan Tang
An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter. IEEE J. Solid State Circuits 55(11): 3064-3075 (2020) - [j5]Xiyuan Tang
A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier. IEEE J. Solid State Circuits 55(12): 3248-3259 (2020) - [j4]Jiaxin Liu
A 13-bit 0.005-mm2 40-MS/s SAR ADC With kT/C Noise Cancellation. IEEE J. Solid State Circuits 55(12): 3260-3270 (2020) - [c7]Haoyu Zhuang
A Fully-Dynamic Time-Interleaved Noise-Shaping SAR ADC Based on CIFF Architecture. CICC 2020: 1-4 - [c6]Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Nan Sun:
9.3 A 40kHz-BW 90dB-SNDR Noise-Shaping SAR with 4× Passive Gain and 2nd-Order Mismatch Error Shaping. ISSCC 2020: 158-160 - [c5]Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, David Z. Pan, Nan Sun:
9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier. ISSCC 2020: 162-164 - [c4]Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, Nan Sun:
16.5 A 13b 0.005mm2 40MS/s SAR ADC with kT/C Noise Cancellation. ISSCC 2020: 258-260
2010 – 2019
- 2019
- [j3]Jiaxin Liu
A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT ΔΣ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer. IEEE J. Solid State Circuits 54(2): 428-440 (2019) - [j2]Haoyu Zhuang
A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting. IEEE J. Solid State Circuits 54(6): 1636-1647 (2019) - [j1]Jiaxin Liu
Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1342-1354 (2019) - [c3]Dengquan Li, Jiaxin Liu
A 7b 2.6mW 900MS/s Nonbinary 2-then-3b/cycle SAR ADC with Background Offset Calibration. CICC 2019: 1-4 - [c2]Xiyuan Tang, Shaolan Li, Linxiao Shen, Wenda Zhao, Xiangxing Yang, Randy Williams
A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital Converter. ISSCC 2019: 296-297 - 2018
- [c1]Jiaxin Liu
A 0.029MM2 17-FJ/Conv.-Step CT $\Delta\Sigma$ ADC with 2nd-Order Noise-Shaping SAR Quantizer. VLSI Circuits 2018: 201-202
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2026-05-08 02:05 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: