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Boris Murmann
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- affiliation: Stanford University, USA
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2020 – today
- 2024
- [j61]Matthew Guthaus
, Kwantae Kim
Open-Source Silicon - Unleashing Innovation and Collaboration. IEEE Des. Test 41(6): 5-7 (2024) - [j60]Moon Hyung Jang
A 1024-Channel 268-nW/Pixel 36×36 μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. IEEE J. Solid State Circuits 59(4): 1123-1136 (2024) - [j59]Akash Levy
EMBER: Efficient Multiple-Bits-Per-Cell Embedded RRAM Macro for High-Density Digital Storage. IEEE J. Solid State Circuits 59(7): 2081-2092 (2024) - [j58]Qianyun Lu
Enhancing the Energy Efficiency and Robustness of tinyML Computer Vision Using Coarsely-quantized Log-gradient Input Images. ACM Trans. Embed. Comput. Syst. 23(3): 41:1-41:20 (2024) - [c93]Brian Plancher, Sebastian Büttrich, Jeremy Ellis, Neena Goveas, Laila D. Kazimierski, Jesús Alfonso López Sotelo, Milan Lukic, Diego Mendez
TinyML4D: Scaling Embedded Machine Learning Education in the Developing World. AAAI Spring Symposia 2024: 508-515 - [c92]Massimo Giordano
TinyForge: A Design Space Exploration to Advance Energy and Silicon Area Trade-offs in tinyML Compute Architectures with Custom Latch Arrays. ASPLOS (3) 2024: 1033-1047 - [c91]Yasser Khan
On Stress: Combining Human Factors and Biosignals to Inform the Placement and Design of a Skin-like Stress Sensor. CHI 2024: 997:1-997:13 - [c90]Boris Murmann:
Practical Aspects of Script-Based Analog Design Using Precomputed Lookup Tables. ISCAS 2024: 1-5 - [c89]Rohan Doshi, Massimo Giordano, Justin Olah, Zhidong Cao, Moon Hyung Jang, Luke R. Upton, Athanasios Ramkaj, Boris Murmann:
Medusa: A 0.83/4.6μJ/Frame 86/91.6%-CIFAR-10 TinyML Processor with Pipelined Pixel Streaming of Bottleneck Layers in 28nm CMOS. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j57]Karimeldeen Mohamed
Capturing Layout Dependent Effects in MOSFET Circuit Sizing Using Precomputed Lookup Tables. IEEE Access 11: 41205-41217 (2023) - [j56]Stephen Weinreich
A 0.6-1.8-mW 3.4-dB NF Mixer-First Receiver With an N-Path Harmonic-Rejection Transformer-Mixer. IEEE J. Solid State Circuits 58(6): 1508-1518 (2023) - [j55]Vijay Janapa Reddi
Special Issue on TinyML. IEEE Micro 43(6): 7-10 (2023) - [j54]Pumiao Yan
Data Compression Versus Signal Fidelity Tradeoff in Wired-OR Analog-to-Digital Compressive Arrays for Neural Recording. IEEE Trans. Biomed. Circuits Syst. 17(4): 754-767 (2023) - [c88]Luke R. Upton, Akash Levy
EMBER: A 100 MHz, 0.86 mm2, Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read Circuitry. ESSCIRC 2023: 469-472 - [c87]Athanasios Ramkaj, Michael Perrott, Baher Haroun, Boris Murmann:
High-Linearity High-Bandwidth (>20GHz) T&H Front Ends Using Active Bootstrapping and Heterogeneous SiGe/CMOS Circuit Co-Design. ISCAS 2023: 1-5 - [c86]Luke R. Upton, Guénolé Lallement, Michael D. Scott, Joyce Taylor, Robert M. Radway, Dennis Rich
Testbench on a Chip: A Yield Test Vehicle for Resistive Memory Devices. ISQED 2023: 1-7 - [c85]Moon Hyung Jang
A 1024-Channel 268 nW/pixel 36x36 μm2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j53]Geoffrey W. Burr
Fair and Comprehensive Benchmarking of Machine Learning Processing Chips. IEEE Des. Test 39(3): 18-27 (2022) - [j52]Kartik Prabhu
CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. IEEE J. Solid State Circuits 57(4): 1013-1026 (2022) - [c84]Pumiao Yan, Nishal P. Shah, Dante G. Muratore, Pulkit Tandon, E. J. Chichilnisky, Boris Murmann:
Data Compression versus Signal Fidelity Trade-off in Wired-OR ADC Arrays for Neural Recording. BioCAS 2022: 80-84 - [c83]Pietro Caragiulo, Athanasios Ramkaj, Amin Arbabian, Boris Murmann:
A 56 GS/s 8-bit 0.011 mm2 4x Delta-Interleaved Switched-Capacitor DAC in 16nm FinFET CMOS. ESSCIRC 2022: 329-332 - [c82]Boris Murmann:
Bridging the Physical and Digital Worlds in Data-Driven Systems. VLSI-DAT 2022: 1 - [i7]Qianyun Lu, Boris Murmann:
Improving the Energy Efficiency and Robustness of tinyML Computer Vision using Log-Gradient Input Images. CoRR abs/2203.02571 (2022) - [i6]Richard A. Gottscho, Edlyn V. Levine, Tsu-Jae King Liu, Paul C. McIntyre, Subhasish Mitra, Boris Murmann, Jan M. Rabaey, Sayeef S. Salahuddin, Willy C. Shih, H.-S. Philip Wong:
Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies. CoRR abs/2204.02216 (2022) - 2021
- [j51]Dusan M. Stipanovic
Stability of Gated Recurrent Unit Neural Networks: Convex Combination Formulation Approach. J. Optim. Theory Appl. 188(1): 291-306 (2021) - [j50]Pietro Caragiulo
A 2✖ Time-Interleaved 28-GS/s 8-Bit 0.03-mm2 Switched-Capacitor DAC in 16-nm FinFET CMOS. IEEE J. Solid State Circuits 56(8): 2335-2346 (2021) - [j49]Wei-Hsiang Ho
A 32 Gb/s PAM-4 Optical Transceiver With Active Back Termination in 40 nm CMOS Technology. IEEE Open J. Circuits Syst. 2: 56-64 (2021) - [j48]Wenning Jiang
A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler. IEEE Trans. Circuits Syst. I Regul. Pap. 68(2): 557-568 (2021) - [j47]Daniel Villamizar
An 800 nW Switched-Capacitor Feature Extraction Filterbank for Sound Classification. IEEE Trans. Circuits Syst. I Regul. Pap. 68(4): 1578-1588 (2021) - [j46]Boris Murmann
Mixed-Signal Computing for Deep Neural Network Inference. IEEE Trans. Very Large Scale Integr. Syst. 29(1): 3-13 (2021) - [j45]Po-Hsuan Wei
Analog and Mixed-Signal Layout Automation Using Digital Place-and-Route Tools. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1838-1849 (2021) - [c81]Muhammad Shafique
TinyML: Current Progress, Research Challenges, and Future Roadmap. DAC 2021: 1303-1306 - [c80]Edoardo Charbon, Alicia Klinefelter, Massimo Alioto, Yao-Hong Liu, Munehiko Nagatani, Arijit Raychowdhury, Andreia Cathelin, Boris Murmann:
F4: Electronics for a Quantum World. ISSCC 2021: 525-528 - [c79]Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak
A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory. MWSCAS 2021: 326-329 - [c78]Massimo Giordano, Kartik Prabhu, Kalhan Koul, Robert M. Radway, Albert Gural, Rohan Doshi, Zainab F. Khan, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina:
CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. VLSI Circuits 2021: 1-2 - 2020
- [j44]Abdelrahman A. Youssef
Analog IC Design Using Precomputed Lookup Tables: Challenges and Solutions. IEEE Access 8: 134640-134652 (2020) - [j43]Nikolaus Hammler
Distortion Analysis of RC Integrators With Wideband Input Signals. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 12-22 (2020) - [c77]Elaina Chai, Mert Pilanci, Boris Murmann:
Separating the Effects of Batch Normalization on CNN Training Speed and Stability Using Classical Adaptive Filter Theory. ACSSC 2020: 1214-1221 - [c76]Karthik Ganesan
Sensory Particles with Optical Telemetry. ISCAS 2020: 1-5 - [c75]Wei-Hsiang Ho, Yi-Hsun Hsieh, Boris Murmann, Wei-Zen Chen:
A 32 Gb/s PAM-4 Optical Transceiver with Active Back Termination in 40 nm CMOS Technology. ISCAS 2020: 1-4 - [c74]Jaewook Kwon, Changuk Lee, Youngcheol Chae, Boris Murmann:
Design Considerations for External Compensation Approaches to OLED Display Degradation. ISCAS 2020: 1-5 - [c73]Stephen Weinreich, Dante G. Muratore, Youngcheol Chae, Thomas McKay, Boris Murmann:
Implications of Finite Clock Transition Time for LPTV Circuit Analysis. ISCAS 2020: 1-5 - [c72]Chenxin Zhu, Elizabeth Schell
Wearable System Design using Intrinsically Stretchable Temperature Sensor. ISCAS 2020: 1-4 - [c71]Pietro Caragiulo, Oscar Elisio Mattia, Amin Arbabian, Boris Murmann:
A Compact 14 GS/s 8-Bit Switched-Capacitor DAC in 16 nm FinFET CMOS. VLSI Circuits 2020: 1-2 - [i5]Elaina Chai, Mert Pilanci, Boris Murmann:
Separating the Effects of Batch Normalization on CNN Training Speed and Stability Using Classical Adaptive Filter Theory. CoRR abs/2002.10674 (2020) - [i4]Vladimir Kesler
Going Beyond the Debye Length: Overcoming Charge Screening Limitations in Next-Generation Bioelectronic Sensors. CoRR abs/2007.13201 (2020) - [i3]Albert Gural, Phillip M. Nadeau, Mehul Tikekar, Boris Murmann:
Low-Rank Training of Deep Neural Networks for Emerging Memory Technology. CoRR abs/2009.03887 (2020)
2010 – 2019
- 2019
- [j42]Chia-Yu Chen
Custom Sub-Systems and Circuits for Deep Learning: Guest Editorial Overview. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(2): 247-252 (2019) - [j41]Shankar A. Deka
Global Asymptotic Stability and Stabilization of Long Short-Term Memory Neural Networks with Constant Weights and Biases. J. Optim. Theory Appl. 181(1): 231-243 (2019) - [j40]Daniel Bankman
An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS. IEEE J. Solid State Circuits 54(1): 158-172 (2019) - [j39]Christopher Young
A Data-Compressive 1.5/2.75-bit Log-Gradient QVGA Image Sensor With Multi-Scale Readout for Always-On Object Detection. IEEE J. Solid State Circuits 54(11): 2932-2946 (2019) - [j38]Dante Gabriel Muratore
A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording. IEEE Trans. Biomed. Circuits Syst. 13(6): 1128-1140 (2019) - [j37]Nikolaus Hammler
A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3340-3351 (2019) - [c70]Daniel Bankman, J. Messner, Albert Gural, Boris Murmann:
RRAM-Based In-Memory Computing for Embedded Deep Neural Networks. ACSSC 2019: 1511-1515 - [c69]Nishit Shah, Pedram Lajevardi, Ken Wojciechowski, Christoph Lang, Boris Murmann:
An Energy Harvester Using Image Sensor Pixels With Cold Start and Over 96% MPPT Efficiency. ESSCIRC 2019: 207-210 - [c68]Albert Gural, Boris Murmann:
Memory-Optimal Direct Convolutions for Maximizing Classification Accuracy in Embedded Applications. ICML 2019: 2515-2524 - [c67]Shankar A. Deka
Long-Short Term Memory Neural Network Stability and Stabilization using Linear Matrix Inequalities. ISCAS 2019: 1-4 - [c66]Dante G. Muratore
A Data-Compressive Wired-OR Readout for Massively Parallel Neural Recording. ISCAS 2019: 1-5 - [c65]Daniel Villamizar
Sound Classification using Summary Statistics and N-Path Filtering. ISCAS 2019: 1-5 - [c64]Christopher Young
A Data-Compressive 1.5b/2.75b Log-Gradient QVGA Image Sensor with Multi-Scale Readout for Always-On Object Detection. ISSCC 2019: 98-100 - 2018
- [j36]Alex Omid-Zohoor
Toward Always-On Mobile Object Detection: Energy Versus Performance Tradeoffs for Embedded HOG Feature Extraction. IEEE Trans. Circuits Syst. Video Technol. 28(5): 1102-1115 (2018) - [c63]Wenning Jiang
A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler. A-SSCC 2018: 235-238 - [c62]Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann
BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS. CICC 2018: 1-4 - [c61]Kevin Zheng, Yohan Frans, Ken Chang, Boris Murmann
A 56 Gb/s 6 mW 300 um2 inverter-based CTLE for short-reach PAM2 applications in 16 nm CMOS. CICC 2018: 1-4 - [c60]Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst
TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs. DAC 2018: 74:1-74:10 - [c59]Shankarram Athreya, Hiva Hedayati, Shayan Kazemkhani, Yanfei Chen, Saurabh Vats, Michael D. Scott, Bart Zeydel, Peter Keller, Jian Wang, Bhaskarareddy Avula, Boris Murmann, Echere Iroaga:
Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver. ESSCIRC 2018: 250-253 - [c58]Minho Kwon, Boris Murmann:
A New Figure of Merit Equation for Analog-to-Digital Converters in CMOS Image Sensors. ISCAS 2018: 1-5 - [c57]Dusan M. Stipanovic
Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model. ISCAS 2018: 1-5 - [c56]Lita Yang, Daniel Bankman, Bert Moons, Marian Verhelst
Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor. ISCAS 2018: 1-5 - [c55]Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst
An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS. ISSCC 2018: 222-224 - [c54]Kevin Zheng, Yohan Frans, Sai Lalith Ambatipudi, Santiago Asuncion, Hari Teja Reddy, Ken Chang, Boris Murmann:
An Inverter-Based Analog Front End for a 56 GB/S PAM4 Wireline Transceiver in 16NMCMOS. VLSI Circuits 2018: 269-270 - [i2]Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst:
BinarEye: An Always-On Energy-Accuracy-Scalable Binary CNN Processor With All Memory On Chip in 28nm CMOS. CoRR abs/1804.05554 (2018) - 2017
- [j35]Douglas Adams
A Mixer Front End for a Four-Channel Modulated Wideband Converter With 62-dB Blocker Rejection. IEEE J. Solid State Circuits 52(5): 1286-1294 (2017) - [j34]Man-Chia Chen
A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. IEEE J. Solid State Circuits 52(11): 2843-2856 (2017) - [j33]Chi-Hang Chan, Yan Zhu, Sai-Weng Sin
Metastablility in SAR ADCs. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 111-115 (2017) - [j32]Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann
A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 116-120 (2017) - [c53]Edward H. Lee, Daisuke Miyashita, Elaina Chai, Boris Murmann
LogNet: Energy-efficient neural networks using logarithmic computation. ICASSP 2017: 5900-5904 - [c52]Lita Yang, Boris Murmann
SRAM voltage scaling for energy-efficient convolutional neural networks. ISQED 2017: 7-12 - [c51]Boris Murmann
Foreword: Intelligent Chips for a Smart World. ISSCC 2017: 5 - [c50]Anantha P. Chandrakasan, Boris Murmann:
Session 1 overview: Plenary Session. ISSCC 2017: 6-7 - [c49]Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI. ISSCC 2017: 456-457 - [c48]Lita Yang, Boris Murmann
Approximate SRAM for Energy-Efficient, Privacy-Preserving Convolutional Neural Networks. ISVLSI 2017: 689-694 - 2016
- [j31]Boris Murmann
The successive approximation register ADC: a versatile building block for ultra-low- power to ultra-high-speed applications. IEEE Commun. Mag. 54(4): 78-83 (2016) - [c47]Daniel Bankman, Boris Murmann
An 8-bit, 16 input, 3.2 pJ/op switched-capacitor dot product circuit in 28-nm FDSOI CMOS. A-SSCC 2016: 21-24 - [c46]Si Chen, Boris Murmann
An 8-bit 1.25GS/s CMOS IF-sampling ADC with background calibration for dynamic distortion. A-SSCC 2016: 69-72 - [c45]David Robertson
Data converter reflections: 19 papers from the last ten years that deserve a second look. ESSCIRC 2016: 161-164 - [c44]Ryan Boesch, Kevin Zheng, Boris Murmann
A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE. VLSI Circuits 2016: 1-2 - [i1]Daisuke Miyashita, Edward H. Lee, Boris Murmann:
Convolutional Neural Networks using Logarithmic Data Representation. CoRR abs/1603.01025 (2016) - 2015
- [j30]Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann
A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS. IEEE J. Solid State Circuits 50(12): 2891-2900 (2015) - [j29]Inna Vaisband
A Closed-Loop Reconfigurable Switched-Capacitor DC-DC Converter for Sub-mW Energy Harvesting Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(2): 385-394 (2015) - [c43]Boris Murmann
Mixed-signal circuits for embedded machine-learning applications. ACSSC 2015: 1341-1345 - [c42]Mahmoud Saadat, Boris Murmann
A 0.6 V-2.4 V input, fully integrated reconfigurable switched-capacitor DC-DC converter for energy harvesting sensor tags. A-SSCC 2015: 1-4 - [c41]Jonathon Spaulding, Yonina C. Eldar, Boris Murmann
Mixer-based subarray beamforming for sub-Nyquist sampling ultrasound architectures. ICASSP 2015: 882-886 - [c40]Paul G. A. Jespers, Boris Murmann
Calculation of MOSFET distortion using the transconductance-to-current ratio (gm/ID). ISCAS 2015: 529-532 - [c39]Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann
15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS. ISSCC 2015: 1-3 - 2014
- [j28]Yang Guo, Christopher Aquino, David Zhang, Boris Murmann
A Four-Channel, ±36 V, 780 kHz Piezo Driver Chip for Structural Health Monitoring. IEEE J. Solid State Circuits 49(7): 1506-1513 (2014) - [j27]Vaibhav Tripathi, Boris Murmann
Mismatch Characterization of Small Metal Fringe Capacitors. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(8): 2236-2242 (2014) - [j26]Samer Medawar
Static Integral Nonlinearity Modeling and Calibration of Measured and Synthetic Pipeline Analog-to-Digital Converters. IEEE Trans. Instrum. Meas. 63(3): 502-511 (2014) - [c38]Vaibhav Tripathi, Boris Murmann
A 160 MS/s, 11.1 mW, single-channel pipelined SAR ADC with 68.3 dB SNDR. CICC 2014: 1-4 - [c37]Ute Zschieschang, Reinhold Rodel, Ulrike Kraft, Kazuo Takimiya, Tarek Zaki, Florian Letzkus, Joerg Butschke, Harald Richter, Joachim N. Burghartz, Wei Xiong, Boris Murmann, Hagen Klauk:
Low-voltage organic transistors for flexible electronics. DATE 2014: 1-6 - [c36]Nikolaus Hammler, Yonina C. Eldar, Boris Murmann
Low-rate identification of memory polynomials. ISCAS 2014: 1034-1037 - [c35]Siddharth Seth, Boris Murmann
Design and optimization of continuous-time filters using geometric programming. ISCAS 2014: 2089-2092 - [c34]Boris Murmann:
Teaching an old dog new tricks: Views on the future of mixed-signal IC design. ITC 2014: 1 - 2013
- [j25]Pedram Lajevardi, Vladimir P. Petkov, Boris Murmann
A ΔΣ Interface for MEMS Accelerometers Using Electrostatic Spring Constant Modulation for Cancellation of Bondwire Capacitance Drift. IEEE J. Solid State Circuits 48(1): 265-275 (2013) - [j24]Drew A. Hall
A 256 Pixel Magnetoresistive Biosensor Microarray in 0.18 µm CMOS. IEEE J. Solid State Circuits 48(5): 1290-1301 (2013) - [j23]Siddharth Seth, Boris Murmann
Settling Time and Noise Optimization of a Three-Stage Operational Transconductance Amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(5): 1168-1174 (2013) - [j22]Samer Medawar
Dynamic Calibration of Undersampled Pipelined ADCs by Frequency Domain Filtering. IEEE Trans. Instrum. Meas. 62(7): 1882-1891 (2013) - [c33]Boris Murmann
A/D converter circuit and architecture design for high-speed data communication. CICC 2013: 1-78 - [c32]Vaibhav Tripathi, Boris Murmann
Mismatch characterization of small metal fringe capacitors. CICC 2013: 1-4 - [c31]Boris Murmann
Digitally assisted data converter design. ESSCIRC 2013: 24-31 - [c30]Yang Guo, Christopher Aquino, David Zhang, Boris Murmann
A four-channel, ±36 V, 780 kHz piezo driver chip for structural health monitoring. ESSCIRC 2013: 85-88 - [c29]Vaibhav Tripathi, Boris Murmann
An 8-bit 450-MS/s single-bit/cycle SAR ADC in 65-nm CMOS. ESSCIRC 2013: 117-120 - [c28]Boris Murmann, Tetsuya Iizuka:
Session 26 overview: High-speed data converters. ISSCC 2013: 460-461 - [c27]Boris Murmann, Jafar Savoj, Piet Wambacq, Jieh-Tsorng Wu:
F6: Mixed-signal/RF design and modeling in next-generation CMOS. ISSCC 2013: 510-511 - 2012
- [j21]Hua Gao, Ross M. Walker, Paul Nuyujukian
HermesE: A 96-Channel Full Data Rate Direct Neural Interface in 0.13 µm CMOS. IEEE J. Solid State Circuits 47(4): 1043-1055 (2012) - [j20]Justin Kyung-Ryun Kim, Boris Murmann
A 12-b, 30-MS/s, 2.95-mW Pipelined ADC Using Single-Stage Class-AB Amplifiers and Deterministic Background Calibration. IEEE J. Solid State Circuits 47(9): 2141-2151 (2012) - [c26]Siddharth Seth, Shasha Wang, Thomas W. Kenny, Boris Murmann
A -131-dBc/Hz, 20-MHz MEMS oscillator with a 6.9-mW, 69-kΩ, gain-tunable CMOS TIA. ESSCIRC 2012: 249-252 - [c25]Douglas Adams, Chester Sungchung Park, Yonina C. Eldar, Boris Murmann
Towards an integrated circuit design of a compressed sampling wireless receiver. ICASSP 2012: 5305-5308 - [c24]Siddharth Seth, Boris Murmann
Settling time and noise optimization of a three-stage operational transconductance amplifier. ISCAS 2012: 205-208 - [c23]Pedram Lajevardi, Vladimir P. Petkov, Boris Murmann
A ΔΣ interface for MEMS accelerometers using electrostatic spring-constant modulation for cancellation of bondwire capacitance drift. ISSCC 2012: 196-198 - [c22]Willy Sansen, Christian C. Enz, Boris Murmann, Philip K. T. Mok:
Low-power analog signal processing. ISSCC 2012: 518 - 2011
- [j19]Takayuki Konishi, Kenji Inazu, Jun Gyu Lee, Masanori Natsui
Design Optimization of High-Speed and Low-Power Operational Transconductance Amplifier Using gm/ID Lookup Table Methodology. IEICE Trans. Electron. 94-C(3): 334-345 (2011) - [j18]Manar El-Chammas, Boris Murmann
A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration. IEEE J. Solid State Circuits 46(4): 838-847 (2011) - [j17]Shinichi Hori, Boris Murmann
Feedforward Interference Cancellation Architecture for Short-Range Wireless Communication. IEEE Trans. Circuits Syst. II Express Briefs 58-II(1): 16-20 (2011) - [c21]Ray Nguyen, Christine Raynaud, Andreia Cathelin, Boris Murmann
A 6.7-ENOB, 500-MS/s, 5.1-mW dynamic pipeline ADC in 65-nm SOI CMOS. ESSCIRC 2011: 359-362 - [c20]Boris Murmann, Venu Gopinathan:
Data converter breakthroughs in retrospect. ISSCC 2011: 528 - 2010
- [j16]Boris Murmann
Trends in Low-Power, Digitally Assisted A/D Conversion. IEICE Trans. Electron. 93-C(6): 718-729 (2010) - [j15]Wei Xiong, Yang Guo, Ute Zschieschang, Hagen Klauk, Boris Murmann
A 3-V, 6-Bit C-2C Digital-to-Analog Converter Using Complementary Organic Thin-Film Transistors on Glass. IEEE J. Solid State Circuits 45(7): 1380-1388 (2010) - [j14]Ray Nguyen, Boris Murmann
The Design of Fast-Settling Three-Stage Amplifiers Using the Open-Loop Damping Factor as a Design Parameter. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1244-1254 (2010) - [c19]Justin Kyung-Ryun Kim, Boris Murmann
A 12-bit, 30-MS/s, 2.95-mW pipelined ADC using single-stage class-AB amplifiers and deterministic background calibration. ESSCIRC 2010: 378-381 - [c18]Boris Murmann
Design of analog circuits using organic field-effect transistors. ICCAD 2010: 504-507 - [c17]Drew A. Hall
Portable biomarker detection with magnetic nanotags. ISCAS 2010: 1779-1782 - [c16]Wei Xiong, Ute Zschieschang, Hagen Klauk, Boris Murmann
A 3V 6b successive-approximation ADC using complementary organic thin-film transistors on glass. ISSCC 2010: 134-135
2000 – 2009
- 2009
- [j13]Jason Hu, Noam Dolev, Boris Murmann
A 9.4-bit, 50-MS/s, 1.44-mW Pipelined ADC Using Dynamic Source Follower Residue Amplification. IEEE J. Solid State Circuits 44(4): 1057-1066 (2009) - [j12]Parastoo Nikaeen, Boris Murmann
Digital Compensation of Dynamic Acquisition Errors at the Front-End of High-Performance A/D Converters. IEEE J. Sel. Top. Signal Process. 3(3): 499-508 (2009) - [j11]Timmy Sundström, Boris Murmann
Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(3): 509-518 (2009) - [j10]Manar El-Chammas, Boris Murmann
General Analysis on the Impact of Phase-Skew in Time-Interleaved ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 902-910 (2009) - [c15]James C. Salvia, Pedram Lajevardi, Mohammad Hekmat, Boris Murmann
A 56MΩ CMOS TIA for MEMS applications. CICC 2009: 199-202 - [c14]Wei Xiong, Yang Guo, Boris Murmann
A 3-V, 6-bit C-2C digital-to-analog converter using complementary organic thin-film transistors on glass. ESSCIRC 2009: 212-215 - 2008
- [j9]Alireza Dastgheib, Boris Murmann
Calculation of Total Integrated Noise in Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(10): 2988-2993 (2008) - [c13]Boris Murmann
A/D converter trends: Power dissipation, scaling and digitally assisted architectures. CICC 2008: 105-112 - [c12]Parastoo Nikaeen, Boris Murmann
Digital correction of dynamic track-and-hold errors providing SFDR ≫ 83 dB up to fin = 470 MHz. CICC 2008: 161-164 - [c11]Manar El-Chammas, Boris Murmann
General analysis on the impact of phase-skew in time-interleaved ADCs. ISCAS 2008: 17-20 - [c10]Boris Murmann
Digitally enhanced analog circuits: System aspects. ISCAS 2008: 560-563 - [c9]Angel Abusleme
Predictive control algorithm for phase-locked loops. ISCAS 2008: 1528-1531 - [c8]Parastoo Nikaeen, Boris Murmann
Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs. ISQED 2008: 396-400 - [c7]Jae Wook Kim, Boris Murmann
Hybrid Integration of Bandgap Reference Circuits Using Silicon ICs and Germanium Devices. ISQED 2008: 429-432 - [c6]Venu Gopinathan, Boris Murmann:
Unusual Data-Converter Techniques. ISSCC 2008: 154-155 - 2007
- [j8]Echere Iroaga, Boris Murmann
A 12-Bit 75-MS/s Pipelined ADC Using Incomplete Settling. IEEE J. Solid State Circuits 42(4): 748-756 (2007) - [j7]Boris Murmann
Digital Domain Measurement and Cancellation of Residue Amplifier Nonlinearity in Pipelined ADCs. IEEE Trans. Instrum. Meas. 56(6): 2504-2514 (2007) - [c5]Yangjin Oh, Boris Murmann
A Low-Power, 6-bit Time-Interleaved SAR ADC Using OFDM Pilot Tone Calibration. CICC 2007: 193-196 - [c4]Shu-Jen Han, Heng Yu, Boris Murmann
A High-Density Magnetoresistive Biosensor Array with Drift-Compensation Mechanism. ISSCC 2007: 168-594 - 2006
- [j6]Jung-Hoon Chun, Boris Murmann
Analysis and Measurement of Signal Distortion due to ESD Protection Circuits. IEEE J. Solid State Circuits 41(10): 2354-2358 (2006) - [j5]Boris Murmann
Digitally Assisted Analog Circuits. IEEE Micro 26(2): 38-47 (2006) - [j4]Yangjin Oh, Boris Murmann
System embedded ADC calibration for OFDM receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(8): 1693-1703 (2006) - [j3]Amin Nikoozadeh, Boris Murmann
An Analysis of Latch Comparator Offset Due to Load Capacitor Mismatch. IEEE Trans. Circuits Syst. II Express Briefs 53-II(12): 1398-1402 (2006) - [c3]Benjamin Sheahan, John W. Fattaruso, Jennifer Wong, Karlheinz Muth, Boris Murmann
4.25 Gb/s laser driver: design challenges and EDA tool limitations. DAC 2006: 863-866 - 2005
- [c2]Srikanth Arekapudi, Echere Iroaga, Boris Murmann
A low-power distributed wide-band LNA in 0.18µm CMOS. ISCAS (5) 2005: 5055-5058 - [c1]Echere Iroaga, Boris Murmann
A background correction technique for timing errors in time-interleaved analog-to-digital converters. ISCAS (6) 2005: 5557-5560 - 2004
- [j2]Boris Murmann
Digitally Assisted Analog Integrated Circuits. ACM Queue 2(1): 64-71 (2004) - 2003
- [j1]Boris Murmann
A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification. IEEE J. Solid State Circuits 38(12): 2040-2050 (2003)
Coauthor Index
Dante Gabriel Muratore
aka: Dante G. Muratore
aka: Dante G. Muratore
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