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Agustín Fernández
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2010 – 2019
- 2015
- [c14]Norma Montealegre, David Merodio, Agustín Fernández, Philippe Armbruster:
In-flight reconfigurable FPGA-based space systems. AHS 2015: 1-8 - 2011
- [c13]David López, Josep-Llorenc Cruz
, Fermín Sánchez
A take-home exam to assess professional skills. FIE 2011: 1 - 2010
- [j5]Jordi Roca, Victor Moya Del Barrio, Carlos González, Vicente Escandell, Albert Murciego, Agustín Fernández, Roger Espasa:
A SIMD-efficient 14 instruction shader program for high-throughput microtriangle rasterization. Vis. Comput. 26(6-8): 707-719 (2010)
2000 – 2009
- 2006
- [c12]Jordi Roca, Victor Moya Del Barrio, Carlos González, Chema Solis, Agustín Fernández, Roger Espasa:
Workload Characterization of 3D Games. IISWC 2006: 17-26 - [c11]Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa:
ATTILA: a cycle-level execution-driven simulator for modern GPU architectures. ISPASS 2006: 231-241 - 2005
- [c10]Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa:
A Single (Unified) Shader GPU Microarchitecture for Embedded Systems. HiPEAC 2005: 286-301 - [c9]Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa:
Shader Performance Analysis on a Modern GPU Architecture. MICRO 2005: 355-364 - 2003
- [j4]Marta Jiménez, José M. Llabería
A Cost-Effective Implementation of Multilevel Tiling. IEEE Trans. Parallel Distributed Syst. 14(10): 1006-1020 (2003) - 2002
- [j3]Marta Jiménez, José M. Llabería
Register tiling in nonrectangular iteration spaces. ACM Trans. Program. Lang. Syst. 24(4): 409-453 (2002) - 2000
- [c8]Marta Jiménez, José M. Llabería, Agustín Fernández:
On the Performance of Hand vs. Automatically Optimized Numerical Codes. HPCA 2000: 183-194
1990 – 1999
- 1998
- [c7]Marta Jiménez, José M. Llabería, Agustín Fernández:
Performance Evaluation of Tiling for the Register Level. HPCA 1998: 254-265 - [c6]Marta Jiménez, José M. Llabería, Agustín Fernández, Enric Morancho:
A General Algorithm for Tiling the Register Level. International Conference on Supercomputing 1998: 133-140 - [c5]Marta Jiménez, José María Llabería, Agustín Fernández:
Loop bounds computation for multilevel tiling. PDP 1998: 445-452 - 1996
- [c4]Marta Jiménez, José M. Llabería, Agustín Fernández, Enric Morancho:
A Unified Transformation Technique for Multilevel Blocking. Euro-Par, Vol. I 1996: 402-405 - 1995
- [j2]Agustín Fernández, José M. Llabería
Loop Transformation Using Nonunimodular Matrices. IEEE Trans. Parallel Distributed Syst. 6(8): 832-840 (1995) - 1992
- [c3]Alvaro Suárez, José M. Llabería, Agustín Fernández:
Scheduling partitions in systolic algorithms. ASAP 1992: 619-633 - 1991
- [j1]Agustín Fernández, José María Llabería
Performance evaluation of transputer systems with linear algebra problems. Microprocessing and Microprogramming 32(1-5): 825-832 (1991) - [c2]Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García:
Transformation of systolic algorithms for interleaving partitions. ASAP 1991: 56-71 - [c1]Agustín Fernández, José M. Llabería, Juan J. Navarro, Miguel Valero-García:
Interleaving Partitions of Systolic Algorithms for Programming Distributed Memory Multiprocessors. EDMCC 1991: 90-99
Coauthor Index
aka: José M. Llabería
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