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Nathalie Drach-Temam
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- affiliation: LIP6, Paris
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2010 – 2019
- 2016
- [c20]Andi Drebes, Antoniu Pop
, Karine Heydemann, Albert Cohen, Nathalie Drach:
Scalable Task Parallelism for NUMA: A Uniform Abstraction for Coordinated Scheduling and Memory Management. PACT 2016: 125-137 - [c19]Andi Drebes, Antoniu Pop
NUMA-aware scheduling and memory allocation for data-flow task-parallel applications. PPoPP 2016: 44:1-44:2 - 2014
- [j7]Andi Drebes, Karine Heydemann, Nathalie Drach, Antoniu Pop, Albert Cohen:
Topology-Aware and Dependence-Aware Scheduling and Memory Allocation for Task-Parallel Languages. ACM Trans. Archit. Code Optim. 11(3): 30:1-30:25 (2014) - [i1]Andi Drebes, Karine Heydemann, Antoniu Pop, Albert Cohen, Nathalie Drach:
Automatic Detection of Performance Anomalies in Task-Parallel Programs. CoRR abs/1405.2916 (2014) - 2012
- [c18]Mathieu Rosiere, Jean Lou Desbarbieux, Nathalie Drach, Franck Wajsbürt:
An out-of-order superscalar processor on FPGA: The ReOrder Buffer design. DATE 2012: 1549-1554 - 2011
- [c17]Mathieu Rosiere, Jean Lou Desbarbieux, Nathalie Drach, Franck Wajsbürt:
Morpheo: A high-performance processor generator for a FPGA implementation. DASIP 2011: 27-34 - [c16]Oussama Gamoudi, Nathalie Drach, Karine Heydemann:
Using Runtime Activity to Dynamically Filter Out Inefficient Data Prefetches. Euro-Par (1) 2011: 338-350 - [c15]Nguyen Minh Huu, Bruno Robisson
Low-cost recovery for the code integrity protection in secure embedded processors. HOST 2011: 99-104 - 2010
- [c14]Nguyen Minh Huu, Bruno Robisson
Low-cost fault tolerance on the ALU in simple pipelined processors. DDECS 2010: 28-31
2000 – 2009
- 2008
- [j6]Alexandre Coveliers, Karine Heydemann, Nathalie Drach:
Étude de la sensibilité aux jeux de données de la compilation itérative. Tech. Sci. Informatiques 27(6): 757-777 (2008) - [c13]Olivier Certner, Zheng Li, Pierre Palatin, Olivier Temam, Frederic Arzel, Nathalie Drach:
A Practical Approach for Reconciling High and Predictable Performance in Non-Regular Parallel Programs. DATE 2008: 740-745 - 2005
- [j5]Claude Limousin, Julien Sébot, Alexis Vartanian, Nathalie Drach:
Architecture optimization for multimedia application exploiting data and thread-level parallelism. J. Syst. Archit. 51(1): 15-27 (2005) - 2004
- [c12]Michael Dupré, Nathalie Drach, Olivier Temam:
VHC: Quickly Building an Optimizer for Complex Embedded Architectures. CGO 2004: 53-64 - 2003
- [j4]Michael Dupré, Nathalie Drach:
Algorithme d'ordonnancement dynamique pour exécution statique. Tech. Sci. Informatiques 22(6): 713-735 (2003) - 2002
- [j3]Nathalie Drach, Jean-Luc Béchennec, Olivier Temam:
Increasing hardware data prefetching performance using the second-level cache. J. Syst. Archit. 48(4-5): 137-149 (2002) - 2001
- [c11]Julien Sébot, Nathalie Drach-Temam:
Memory Bandwidth: The True Bottleneck of SIMD Multimedia Performance on a Superscalar Processor. Euro-Par 2001: 439-447 - [c10]Claude Limousin, Julien Sébot, Alexis Vartanian, Nathalie Drach-Temam:
Improving 3D geometry transformations on a simultaneous multithreaded SIMD processor. ICS 2001: 236-245 - 2000
- [c9]Alexis Vartanian, Jean-Luc Béchennec, Nathalie Drach-Temam:
The Best Distribution for a Parallel OpenGL 3D Engine with Texture Caches. HPCA 2000: 399-408
1990 – 1999
- 1999
- [c8]Julien Sébot, Alexis Vartanian, Jean-Luc Béchennec, Nathalie Drach-Temam:
A Parallel Algorithm for 3D Geometry Transformations in OpenGL. Euro-Par 1999: 659-662 - [c7]Alexis Vartanian, Jean-Luc Béchennec, Nathalie Drach-Temam:
Two Schemes to Improve the Performance of a Sort-Last 3D Parallel Rendering Machine with Texture Caches. Euro-Par 1999: 757-760 - 1998
- [c6]Alexis Vartanian, Jean-Luc Béchennec, Nathalie Drach-Temam:
Evaluation of High Performance Multicache Parallel Texture Mapping. International Conference on Supercomputing 1998: 289-296 - 1995
- [j2]Olivier Temam, Nathalie Drach:
Software assistance for data caches. Future Gener. Comput. Syst. 11(6): 519-536 (1995) - [j1]Nathalie Drach, Alain Gefflaut, Philippe Joubert, André Seznec:
About Cache Associativity in Low-Cost Shared Memory Multi-Microprocessors. Parallel Process. Lett. 5: 475-487 (1995) - [c5]Nathalie Drach, André Seznec, Daniel Windheiser:
Direct-mapped versus set-associative pipelined caches. PACT 1995: 79-88 - [c4]Olivier Temam, Nathalie Drach:
Software Assistance for Data Caches. HPCA 1995: 154-163 - [c3]Nathalie Drach:
Hardware Implementation Issues of Data Prefetching. International Conference on Supercomputing 1995: 245-254 - 1993
- [c2]Nathalie Drach, André Seznec:
Semi-Unified Caches. ICPP (1) 1993: 25-28 - [c1]Nathalie Drach, André Seznec:
MIDEE: smoothing branch and instruction cache miss penalties on deep pipelines. MICRO 1993: 193-201
Coauthor Index
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