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"An Efficient and Reliable Negative Margin Timing Error Detection for ..."

Ziyu Li et al. (2021)

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DOI: 10.1109/A-SSCC53895.2021.9634809

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-21

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  dblp key:
  - conf/asscc/LiSWGY21
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  - https://dblp.org/rec/conf/asscc/LiSWGY21
Ziyu Li, Weiwei Shan, Chengjun Wu, Haitao Ge, Jun Yang:
An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS. A-SSCC 2021: 1-3

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