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"Design of R3TOS based reliable low power network on chip."

N. Poornima et al. (2017)

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DOI: 10.1109/EST.2017.8090423

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

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  dblp key:
  - conf/est/PoornimaGAPS17
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  - https://dblp.org/rec/conf/est/PoornimaGAPS17
N. Poornima, Seetharaman Gopalakrishnan, Tughrul Arslan, T. N. Prabakar, M. Santhi:
Design of R3TOS based reliable low power network on chip. EST 2017: 196-203

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