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"Parallel pipelined histogram architecture via C-slow retiming."

José O. Cadenas et al. (2013)

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DOI: 10.1109/ICCE.2013.6486871

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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  dblp key:
  - conf/iccel/CadenasSHKM13
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  - https://dblp.org/rec/conf/iccel/CadenasSHKM13
José O. Cadenas, R. Simon Sherratt, Pablo Huerta, Wen-Chung Kao, Graham M. Megson:
Parallel pipelined histogram architecture via C-slow retiming. ICCE 2013: 230-231

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