<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<article key="journals/jssc/ChangLWCCLSKLY13" mdate="2024-08-04">
<author>Meng-Fan Chang</author>
<author>Chih-Sheng Lin</author>
<author>Wei-Cheng Wu</author>
<author>Ming-Pin Chen</author>
<author>Yen-Huei Chen</author>
<author>Zhe-Hui Lin</author>
<author>Shyh-Shyuan Sheu</author>
<author>Tzu-Kun Ku</author>
<author>Cha-Hsin Lin</author>
<author orcid="0000-0003-4033-8893">Hiroyuki Yamauchi</author>
<title>A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms.</title>
<pages>1521-1529</pages>
<year>2013</year>
<month>June</month>
<volume>48</volume>
<journal>IEEE J. Solid State Circuits</journal>
<number>6</number>
<ee>https://doi.org/10.1109/jssc.2013.2253413</ee>
<url>db/journals/jssc/jssc48.html#ChangLWCCLSKLY13</url>
</article>
</dblp>
