default search action

combined dblp search
author search
venue search
publication search

ask others

"Evaluation of three 32-bit CMOS adders in DCVS logic for self-timed circuits."

Gustavo A. Ruiz (1998)

> Home

Details and statistics

DOI: 10.1109/4.663566

access: closed

type: Journal Article

metadata version: 2022-10-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/Ruiz98
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/Ruiz98
Gustavo A. Ruiz:
Evaluation of three 32-bit CMOS adders in DCVS logic for self-timed circuits. IEEE J. Solid State Circuits 33(4): 604-613 (1998)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.