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"A pipelined array architecture for Euclidean distance transformation and ..."

N. Sudha (2005)

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DOI: 10.1016/J.MICPRO.2004.10.003

access: closed

type: Journal Article

metadata version: 2020-05-18

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N. Sudha:
A pipelined array architecture for Euclidean distance transformation and its FPGA implementation. Microprocess. Microsystems 29(8-9): 405-410 (2005)

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