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"Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient ..."

Kalarikkal Absel, Lijo Manuel, R. K. Kavitha (2013)

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DOI: 10.1109/TVLSI.2012.2213280

access: closed

type: Journal Article

metadata version: 2021-10-14

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  - journals/tvlsi/AbselMK13
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  - https://dblp.org/rec/journals/tvlsi/AbselMK13
Kalarikkal Absel, Lijo Manuel, R. K. Kavitha:
Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic. IEEE Trans. Very Large Scale Integr. Syst. 21(9): 1693-1704 (2013)

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