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"A Low-Jitter Fast-Locked All-Digital Phase-Locked Loop With ..."

Yung-Hsiang Ho, Chia-Yu Yao (2016)

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DOI: 10.1109/TVLSI.2015.2470545

access: closed

type: Journal Article

metadata version: 2020-03-11

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Yung-Hsiang Ho, Chia-Yu Yao:
A Low-Jitter Fast-Locked All-Digital Phase-Locked Loop With Phase-Frequency-Error Compensation. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1984-1992 (2016)

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