• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 46 matches

• 1996
• 
  Charles J. Alpert, Andrew B. Kahng:
  A general framework for vertex orderings with applications to circuit clustering. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 240-246 (1996)
• 
  Smita Bakshi, Daniel D. Gajski:
  Component selection for high-performance pipelines. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 181-194 (1996)
• 
  Srimat T. Chakradhar, Savita Banerjee, Rabindra K. Roy, Dhiraj K. Pradhan:
  Synthesis of initializable asynchronous circuits. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 254-263 (1996)
• 
  V. Chandramouli, Erik Brunvand, Kent F. Smith:
  Self-Timed Design in GaAs - Case Study of a High-Speed, Parallel Multiplier. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 146 (1996)
• 
  Samit Chaudhuri, Robert A. Walker:
  Computing lower bounds on functional units before scheduling. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 273-279 (1996)
• 
  Tan-Li Chou, Kaushik Roy:
  Accurate power estimation of CMOS sequential circuits. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 369-380 (1996)
• 
  Herbert Dawid, Gerhard P. Fettweis, Heinrich Meyr:
  A CMOS IC for Gb/s Viterbi decoding: system design and VLSI implementation. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 17-31 (1996)
• 
  Jan-Erik Eklund, Christer Svensson, Anders Åström:
  VLSI implementation of a focal plane image processor-a realization of the near-sensor image processing concept. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 322-335 (1996)
• 
  Michele Favalli, Cecilia Metra:
  Sensing circuit for on-line detection of delay faults. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 130-133 (1996)
• 
  Sebastian T. J. Fenn, Mohammed Benaissa, David Taylor:
  Finite field inversion over the dual basis. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 134-137 (1996)
• 
  Stephen B. Furber, Paul Day:
  Four-phase micropipeline latch control circuits. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 247-253 (1996)
• 
  Daniel D. Gajski, Sanjiv Narayan, Loganath Ramachandran, Frank Vahid, Peter Fung:
  System design methodologies: aiming at the 100 h design cycle. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 70-82 (1996)
• 
  Jeffrey C. Gealow, Frederick P. Herrmann, L. T. Hsu, Charles G. Sodini:
  System design for pixel-parallel image processing. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 32-41 (1996)
• 
  A. Grzeszczak, Mrinal K. Mandal, Sethuraman Panchanathan:
  VLSI implementation of discrete wavelet transform. IEEE Trans. Very Large Scale Integr. Syst. 4(4): 421-433 (1996)
• 
  Tom Hameenanttila, Jo Dale Carothers, Donghui Li:
  Fast coupled noise estimation for crosstalk avoidance in the MCG multichip module autorouter. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 356-368 (1996)
• 
  Pao-Ann Hsiung, Sao-Jie Chen, Tsung-Chien Hu, Shih-Chiang Wang:
  PSM: an object-oriented synthesis approach to multiprocessor system design. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 83-97 (1996)
• 
  K. W. Hsu, Cherrice Traver:
  Guest Editorial Introduction to the Special Issue on the 1995 IEEE ASIC Conference. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 305 (1996)
• 
  Mahesh A. Iyer, Miron Abramovici:
  FIRE: a fault-independent combinational redundancy identification algorithm. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 295-301 (1996)
• 
  Pradip K. Jha, Nikil D. Dutt:
  High-level library mapping for arithmetic components. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 157-169 (1996)
• 
  Mark B. Josephs, Jelio Todorov Yantchev:
  CMOS design of the tree arbiter element. IEEE Trans. Very Large Scale Integr. Syst. 4(4): 472-476 (1996)
• 
  Hong Shin Jun, Sun Young Hwang:
  Automatic synthesis of dynamically configured pipelines supporting variable data initiation intervals. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 279-285 (1996)
• 
  Ming-Dou Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang:
  Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 307-321 (1996)
• 
  D. J. Kinniment:
  An evaluation of asynchronous addition. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 137-140 (1996)
• 
  Ivan C. Kraljic, Georges Quénot, Bertrand Y. Zavidovique:
  From real-time emulation to ASIC integration for image processing applications. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 391-404 (1996)
• 
  KiJong Lee, Kiyoung Choi:
  Self-timed divider based on RSD number system. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 292-295 (1996)
• 
  Sang-Soo Lee, Carlos A. Laber:
  A 3.5 in 230 Mbytes read-channel chip set for magneto-optical disk drives. IEEE Trans. Very Large Scale Integr. Syst. 4(4): 455-463 (1996)
• 
  Patrick Lysaght, Jon Stockwood:
  A simulation tool for dynamically reconfigurable field programmable gate arrays. IEEE Trans. Very Large Scale Integr. Syst. 4(3): 381-390 (1996)
• 
  Nader Mir-Fakhraei:
  ATM switching architectures for wafer-scale integration. IEEE Trans. Very Large Scale Integr. Syst. 4(4): 464-471 (1996)
• 
  Raj S. Mitra, Partha S. Roop, Anupam Basu:
  A new algorithm for implementation of design functions by available devices. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 170-180 (1996)
• 
  José Luis Neves, Eby G. Friedman:
  Design methodology for synthesizing clock distribution networks exploiting nonzero localized clock skew. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 286-291 (1996)

skipping 16 more matches