• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 283 matches

• 2010
• 
  Osman Musa Abdulkarim, Maitham Shams:
  An Efficient Delay Model for MOS Current-Mode Logic Automated Design and Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2041-2052 (2010)
• 
  Khaldoon Abugharbieh, Shoba Krishnan, Jitendra Mohan, Varadarajan Devnath, Ivan Duzevik:
  An Ultralow-Power 10-Gbits/s LVDS Output Driver. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 262-269 (2010)
• 
  Victor Adrian, Joseph S. Chang, Bah-Hwee Gwee:
  A Randomized Wrapped-Around Pulse Position Modulation Scheme for DC-DC Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2320-2333 (2010)
• 
  Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Shahriar Mirabbasi, William G. Dunford, Patrick R. Palmer:
  A 4 GHz Non-Resonant Clock Driver With Inductor-Assisted Energy Return to Power Grid. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2099-2108 (2010)
• 
  Massimo Alioto:
  Understanding DC Behavior of Subthreshold CMOS Logic Through Closed-Form Analysis. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1597-1607 (2010)
• 
  Massimo Alioto, Elio Consoli, Gaetano Palumbo:
  Flip-Flop Energy/Performance Versus Clock Slope and Impact on the Clock Network Design. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1273-1286 (2010)
• 
  Massimo Alioto, Elio Consoli, Gaetano Palumbo:
  General Strategies to Design Nanometer Flip-Flops in the Energy-Delay Space. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1583-1596 (2010)
• 
  Massimo Alioto, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti:
  Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 355-367 (2010)
• 
  Caroline Andrews, Alyosha C. Molnar:
  Implications of Passive Mixer Transparency for Impedance Matching and Noise Figure in Passive Mixer-First Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(12): 3092-3103 (2010)
• 
  Giulio Antonini, Daniele Frigioni, Giuseppe Miscione:
  Hybrid Formulation of the Equation Systems of the 3-D PEEC Model Based on Graph Algorithms. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 249-261 (2010)
• 
  Abhijith Arakali, Srikanth Gondi, Pavan Kumar Hanumolu:
  Analysis and Design Techniques for Supply-Noise Mitigation in Phase-Locked Loops. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2880-2889 (2010)
• 
  Ashkan Ashrafi, Reza R. Adhami, Aleksandar Milenkovic:
  A Direct Digital Frequency Synthesizer Based on the Quasi-Linear Interpolation Method. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 863-872 (2010)
• 
  Sanghyeon Baeg, Shi-Jie Wen, Richard Wong:
  Minimizing Soft Errors in TCAM Devices: A Probabilistic Approach to Determining Scrubbing Intervals. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(4): 814-822 (2010)
• 
  Ganesh K. Balachandran, Raymond E. Barnett:
  A Passive UHF RFID Demodulator With RF Overvoltage Protection and Automatic Weighted Threshold Adjustment. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2291-2300 (2010)
• 
  Dan Bao, Bo Xiang, Rui Shen, An Pan, Yun Chen, Xiaoyang Zeng:
  Programmable Architecture for Flexi-Mode QC-LDPC Decoder Supporting Wireless LAN/MAN Applications and Beyond. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 125-138 (2010)
• 
  Arindam Basu, Paul E. Hasler:
  Nullcline-Based Design of a Silicon Neuron. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2938-2947 (2010)
• 
  Marco Berkhout, Lutsen Dooper:
  Class-D Audio Amplifiers in Mobile Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(5): 992-1002 (2010)
• 
  André van Bezooijen, Maurice A. de Jongh, Freek van Straten, Reza Mahmoudi, Arthur H. M. van Roermund:
  Adaptive Impedance-Matching Techniques for Controlling L Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 495-505 (2010)
• 
  M. Zulfiquar A. Bhotto, Andreas Antoniou:
  Improved Quasi-Newton Adaptive-Filtering Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2109-2118 (2010)
• 
  Elena Blokhina, Joan Pons, Jordi Ricart, Orla Feely, Manuel Domínguez Pumar:
  Control of MEMS Vibration Modes With Pulsed Digital Oscillators: Part I - Theory. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1865-1878 (2010)
• 
  Rajdeep Bondade, Dongsheng Ma:
  Self-Reconfigurable Channel Data Buffering Scheme and Circuit Design for Adaptive Flow Control in Power-Efficient Network-on-Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11): 2890-2903 (2010)
• 
  Angelo Brambilla, Giambattista Gruosso, Giancarlo Storti Gajani:
  Robust Harmonic-Probe Method for the Simulation of Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2531-2541 (2010)
• 
  Angelo Brambilla, Giambattista Gruosso, Massimo Redaelli, Giancarlo Storti Gajani, Daniele D. Caviglia:
  Improved Small-Signal Analysis for Circuits Working in Periodic Steady State. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 427-437 (2010)
• 
  Robert Bregovic, Ya Jun Yu, Ari Viholainen, Yong Ching Lim:
  Implementation of Linear-Phase FIR Nearly Perfect Reconstruction Cosine-Modulated Filterbanks Utilizing the Coefficient Symmetry. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 139-151 (2010)
• 
  Átila M. Bueno, André Alves Ferreira, José Roberto Castilho Piqueira:
  Modeling and Filtering Double-Frequency Jitter in One-Way Master-Slave Chain Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(12): 3104-3111 (2010)
• 
  Antonio Buonomo, Alessandro Lo Schiavo:
  On the Theory of Quadrature Oscillations Obtained Through Parallel LC VCOs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2509-2519 (2010)
• 
  Trevor C. Caldwell, David A. Johns:
  Incremental Data Converters at Low Oversampling Ratios. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1525-1537 (2010)
• 
  Sergio Callegari, Fabio Pareschi, Gianluca Setti, Mani Soma:
  Complex Oscillation-Based Test and Its Application to Analog Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(5): 956-969 (2010)
• 
  Barbara Cannas, Alessandra Fanni, Augusto Montisci:
  Algebraic Approach to Ambiguity-Group Determination in Nonlinear Analog Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(2): 438-447 (2010)
• 
  Shuqing Cao, Jung-Hoon Chun, Stephen G. Beebe, Robert W. Dutton:
  ESD Design Strategies for High-Speed Digital and RF Circuits in Deeply Scaled Silicon Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2301-2311 (2010)

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