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The architecture of a signal processor developed through simulation | IEEE Conference Publication | IEEE Xplore

The architecture of a signal processor developed through simulation


Abstract:

Host machines of signal processors are closely related to algorithm characteristics, and therefore simultaneous development of architecture and micro-programs could be su...Show More

Abstract:

Host machines of signal processors are closely related to algorithm characteristics, and therefore simultaneous development of architecture and micro-programs could be succesfully done through simulation. In the created simulator, the program modules correspond to hard-ware components, and they are activated only once during a microcycle by using an "Equivalent generalized pipeline stage" model. The architecture is briefly described, with more significance paid to the address generation.
Date of Conference: 03-05 May 1982
Date Added to IEEE Xplore: 29 January 2003
Conference Location: Paris, France

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