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Resilient Chip Multiprocessors with Mixed-Grained Reconfigurability


Abstract:

This article presents a chip multiprocessor (CMP) design that mixes coarse- and fine-grained reconfigurability to increase core availability of safety-critical embedded s...Show More

Abstract:

This article presents a chip multiprocessor (CMP) design that mixes coarse- and fine-grained reconfigurability to increase core availability of safety-critical embedded systems in the presence of hard errors. The authors conducted a comprehensive design-space exploration to identify the granularity mixes that maximize CMP fault tolerance and minimize performance and energy overheads. The authors added fine-grained reconfigurable logic to a coarse-grained sparing approach. Their resulting design can tolerate 3 times more hard errors than core redundancy and 1.5 times more than any other purely coarse-grained solution.
Published in: IEEE Micro ( Volume: 36, Issue: 1, Jan.-Feb. 2016)
Page(s): 35 - 45
Date of Publication: 12 January 2015

ISSN Information:


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