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Rectification of multiple logic design errors in multiple output circuits

Published: 06 June 1994 Publication History
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References

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K. A. Tamura, "Locating Functional Errors in Logic Circuits," Proc. 26th DAC, pp. 185- 191, 1989.
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cover image ACM Conferences
DAC '94: Proceedings of the 31st annual Design Automation Conference
June 1994
739 pages
ISBN:0897916530
DOI:10.1145/196244
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 06 June 1994

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Cited By

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  • (2012)Automated correction of design errors by edge redirection on High-Level Decision DiagramsThirteenth International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2012.6187566(686-693)Online publication date: Mar-2012
  • (2012)Finding and fixing faultsJournal of Computer and System Sciences10.1016/j.jcss.2011.05.00578:2(441-460)Online publication date: 1-Mar-2012
  • (2011)From RTL to siliconProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950884(306-310)Online publication date: 25-Jan-2011
  • (2011)From RTL to silicon: The case for automated debug16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)10.1109/ASPDAC.2011.5722204(306-310)Online publication date: Jan-2011
  • (2010)An Error Diagnosis Technique Based on Clustering of ElementsIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E93.A.2490E93-A:12(2490-2496)Online publication date: 2010
  • (2009)An Error Diagnosis Technique Based on Location Sets to Rectify SubcircuitsIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E92.A.3136E92-A:12(3136-3142)Online publication date: 2009
  • (2009)The day Sherlock Holmes decided to do EDAProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630078(631-634)Online publication date: 26-Jul-2009
  • (2008)Multiple error diagnosis in large combinational circuits using an efficient parallel vector simulation2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)10.1109/VDAT.2008.4542424(109-112)Online publication date: Apr-2008
  • (2008)ECO-Map: Technology remapping for post-mask ECO using simulated annealing2008 IEEE International Conference on Computer Design10.1109/ICCD.2008.4751930(652-657)Online publication date: Oct-2008
  • (2006)Design error diagnosis and correction via test vector simulationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.81132918:12(1803-1816)Online publication date: 1-Nov-2006
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