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Hardware Threading Techniques for Multi-Threaded MPSoCs

Published: 15 June 2014 Publication History

Abstract

Adapting software applications to embedded Multiprocessor System on Chips (MPSoCs) typically follows multithreaded design flows. To take advantage of the hardware customisations possible with MPSoCs, HardWare Threads (HWTs) can be used to increase application concurrency and throughput by forking between software and hardware execution. This paper describes how an application can be tailored to use HWTs. Using an application's Task Flow Graph and Kahn Process Networks to model software interactions with HWTs, two scheduling techniques for HWT interaction with software are presented and analysed. The scheduling techniques are evaluated based on system performance and resource consumption with a popular image processing algorithm, where performance increases of up to 3.6x were measured compared to standard implementations.

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MES '14: Proceedings of International Workshop on Manycore Embedded Systems
June 2014
67 pages
ISBN:9781450328227
DOI:10.1145/2613908
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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  • Univ. Turku: University of Turku

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 June 2014

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Author Tags

  1. Hardware Threads
  2. MPSoC
  3. Multithreading
  4. Object Detection
  5. Scheduling

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MES '14

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Overall Acceptance Rate 5 of 21 submissions, 24%

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