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View all- MATSUNAGA Y(2016)Accelerating SAT-Based Boolean Matching for Heterogeneous FPGAs Using One-Hot Encoding and CEGAR TechniqueIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E99.A.1374E99.A:7(1374-1380)Online publication date: 2016
- Matsunaga Y(2015)Accelerating SAT-based Boolean matching for heterogeneous FPGAs using one-hot encoding and CEGAR techniqueThe 20th Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2015.7059014(255-260)Online publication date: Jan-2015
- Cong JSze CDavoodi A(2014)From design to design automationProceedings of the 2014 on International symposium on physical design10.1145/2560519.2568052(121-126)Online publication date: 30-Mar-2014
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