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System design of a telecommunication router

Published: 02 June 2019 Publication History

Abstract

The demand for telecommunication bandwidth continues to grow rapidly, fuelled by increasing numbers of users, increasing time per user, and increasing connection speeds. Optical fibres can cope with this bandwidth explosion; the fastest links deployed today pack 3.2 terabits down a hair-thin glass fiber, and a modern bundle has hundreds of fiber strands. With ultra-long-haul optics driving photons across the continent without regeneration, lighting petabits per bundle will soon be practical.But while the optics can handle petabits of traffic, today's routers still require converting the traffic to electrons to re-route the traffic at each hop, an average of ten times across the network core. If a router could scale to match the optics, packets could be routed only once onto a wavelength that would be optically transported to its destination city with no need for intermediate electronics. Hyperchip has developed such a router based on a system architecture that scales to support up to petabits of aggregate bandwidthA router consists of complex software for maintaining routing and forwarding tables, dedicated hardware to parse packets and forward them according to those tables, a switch fabric to transfer packets from interface card to interface card, and traffic managers to optimise traffic flow through the switch fabric. While some hardware is implemented in reprogrammable logic, the switch fabric hardware must be in leading edge ASICs for performance, density and minimal power consumption.

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cover image ACM Conferences
ISSS '01: Proceedings of the 14th international symposium on Systems synthesis
September 2001
290 pages
ISBN:1581134185
DOI:10.1145/500001
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 02 June 2019

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ISSS01
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ISSS01: 14th International Symposium on System Synthesis
September 30 - October 3, 2001
P.Q., Montréal, Canada

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Overall Acceptance Rate 38 of 71 submissions, 54%

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