Repository gathering basic modules for CDC purpose

A collection of debugging busses developed and presented at zipcpu.com

An SoC with multiple RISC-V IMA processors.

Graph Processing Framework that supports || OpenMP || CAPI

Audio Signal Processing SoC Project Website

МИЭТ, курс "Архитектуры процессорных систем"

SublimeText (highlighting) plugin for working with Xilinx Vivado files (tcl, xdc, etc)

Covers the DEEDS training material for electronic Design

This repository contains the source codes for design of circuits written in VHDL using Xilinx (14.7), which were practiced as a part of my CA lab during my BTech 4th semester.

Lightweight adventure game inspired by the classic Pokémon series, adapted to run on the DE2i-150 FPGA board.

A Testbench for Application Logic in Corundum

It contains 10 assignments based on simulation and testing of hardware codes on BASYS board.

2022 Fall Bilkent EEE102

Minimal SoC design for alarm clock

Traffic Light Controller uses VHDL to control intersection traffic lights on an Altera MAX10 FPGA, simulating how to manage traffic signals and pedestrian requests.

Tetris in low level programming. Made for Nios II processors.

VSDSquadron Workshop Internship 2025 program where we learn about RISC-V processor and VLSI Design using various open source tools.

Lab and project assignments for the EEE-102 course

Digital Logic & Design (DLD-101) — A beginner-friendly guide to digital circuits, logic gates, sequential systems, and Verilog.