Lib.rs

› Keywords #verilog #hardware #xilinx #hdl #gpu #jtag #driver #spi-flash

#fpga

  1. sus_compiler

    Compiler for the SUS Hardware Design Language

    v0.3.10 #fpga #verilog #sus #vlsi #hdl

  2. fpgad

    An FPGA manager daemon that handles the dirty work for you

    v0.1.1 #fpga #daemon #xilinx #hardware #embedded #embedded-hardware

  3. brup

    updating the BRAM contents of NextPNR Lattice ECP5 FPGA configuration files

    v0.1.2 #fpga #content #updating #memory-block #file-content #config-file #file-memory #memory-file

  4. sc_neurocore_engine

    High-performance SIMD backend for SC-NeuroCore stochastic neuromorphic computing

    v3.14.0 #fpga #stochastic-computing #neuromorphic-computing #neuromorphic #simd #spiking-network

  5. poulpy-hal

    providing layouts and a trait-based hardware acceleration layer with open extension points, matching the API and types of spqlios-arithmetic

    v0.5.0 #extension-point #back-end #vec-znx #api #polynomial #hardware-acceleration #fpga #dft #trait-based #gpu

  6. vlfd-rs

    Modern Rust driver for the VLFD board

    v3.0.1 170 #driver #fpga #hardware #vericomm #usb

  7. minikanren_1bit_chirho

    miniKanren as 1-bit matrix operations - hardware-accelerated logic programming with SIMD, GPU, and FPGA support. Includes Sudoku solver (14μs), N-Queens, constraint propagation.

    v0.3.0 #logic-programming #fpga #constraint-solving #minikanren

  8. ecpdap

    Program ECP5 FPGAs using CMSIS-DAP probes

    v0.3.0 #spi-flash #fpga #cmsis-dap #jtag #probe #bitstream

  9. maia-wasm

    Maia SDR WASM frontend

    v0.7.1 #sdr #webgl2 #fpga #wasm

  10. gw-synth-flash-mcp

    An unofficial MCP server for Gowin IDE CLI workflows as tools

    v0.1.3 #mcp #fpga #gowin

  11. ruvector-fpga-transformer

    FPGA Transformer backend with deterministic latency, quantization-first design, and coherence gating

    v0.1.0 #fpga #low-latency #transformer #inference #quantization

  12. xvc-server-debugbridge

    Backend implementations of the XVC (Xilinx Virtual Cable) server for AMD Debug Bridges

    v0.2.0 #driver #debugging #server #kernel-driver #xvc #memory-map #dev-mem #xilinx #cable #fpga

  13. rust-hdl-ok-core

    Generic support code for OpalKelly based FPGA modules that use the FrontPanel HDL interface

    v0.46.0 100 #fpga #verilog #hardware

  14. x7dap

    Program 7-series FPGAs using CMSIS-DAP probes

    v0.1.0 #probe #jtag #fpga #cmsis-dap #xilinx #soc #bitstream #spi-flash

  15. maia-httpd

    Maia SDR HTTP server

    v0.6.1 #sdr #fpga #zynq

  16. fpgad_cli

    Command-line interface for interacting with the FPGAd daemon

    v0.1.1 #fpga #xilinx #hardware #embedded-hardware #embedded

  17. tfhe-hpu-backend

    HPU implementation on FPGA of TFHE-rs primitives

    v0.5.0 #cryptography #encryption #fpga #fhe #hardware

  18. xvc-server

    implementing Xilinx Virtual Cable (XVC) servers that handle JTAG communication with FPGA devices over network connections

    v0.2.0 #fpga #xvc #jtag #api-bindings

  19. rust_hdl_lib_widgets

    Write firmware for FPGAs in Rust - widget crate

    v0.44.0 #fpga #verilog #hardware

  20. rust_hdl_lib_sim

    Write firmware for FPGAs in Rust - Simulation crate

    v0.44.0 #fpga #verilog #hardware

  21. rust-hdl

    Write firmware for FPGAs in Rust

    v0.46.0 180 #fpga #verilog #hardware

  22. rust-hdl-widgets

    Write firmware for FPGAs in Rust - widget crate

    v0.46.0 210 #fpga #verilog #hardware

  23. rust-hdl-fpga-support

    Support crate for RustHDL - provides FPGA specific code

    v0.46.0 #fpga #verilog #hardware

  24. minroot-cat

    Categorical pipeline abstractions for MinRoot VDF hardware

    v0.1.1 #fpga #hardware-abstraction #pipeline #categorical #vdf #cat #exponent #asic #minroot #functor

  25. fayalite-visit-gen

    detail of fayalite -- Visit/Fold implementation generator

    v0.2.0 150 #fpga #hdl #firrtl #semiconductor #hardware

  26. maia-json

    Maia SDR JSON API

    v0.6.0 370 #sdr #fpga #json

  27. mcl_sched

    installable wrapper for the MCL (Minos Compute Library) Scheduler 'mcl_sched'

    v0.1.0 #run-time #hpc #heterogeneous #fpga #gpu

  28. rust_hdl_lib_fpga_support

    Support crate for RustHDL - provides FPGA specific code

    v0.44.0 #fpga #verilog #hardware

  29. maia-pac

    Maia SDR peripheral access crate

    v0.6.0 #sdr #fpga #zynq

  30. rust-hdl-bsp-ok-xem6010

    Support crate for RustHDL - provides Board Support Package for the OpalKelly XEM6010 FPGA module (Spartan-6 based)

    v0.46.0 #fpga #verilog #hardware

  31. ice40

    An embedded-hal driver for configuration of ice40 FPGA devices

    v0.3.0 290 #embedded-hal-driver #fpga #embedded-driver #driver

  32. rust-hdl-bsp-ok-xem7010

    Support crate for RustHDL - provides Board Support Package for the OpalKelly XEM7010 module (Artix-7 based)

    v0.46.0 #fpga #verilog #hardware

  33. rust_hdl_lib_hls

    Write firmware for FPGAs in Rust - High Level Synthesis crate

    v0.44.0 #fpga #verilog #hardware

  34. rust_hdl_lib_ok_core

    Generic support code for OpalKelly based FPGA modules that use the FrontPanel HDL interface

    v0.44.0 #fpga #verilog #hardware

  35. rust-hdl-bsp-alchitry-cu

    Support crate for RustHDL - provides Board Support Package for the Alchitry Cu board

    v0.46.0 #fpga #verilog #hardware

  36. ni-fpga

    Safe Rust interface to NI FPGAs with FXP support

    v1.4.1 #fpga #fxp #interface #array #offset

  37. mcl-rs

    This system crate provides high-level rust language bindings to the Minos Compute Library (MCL)

    v0.2.0 #run-time #hpc #fpga #heterogeneous #gpu

  38. rust-hdl-hls

    Write firmware for FPGAs in Rust - High Level Synthesis crate

    v0.46.0 160 #fpga #verilog #hardware

  39. rust_hdl_lib_core

    Write firmware for FPGAs in Rust - core crate

    v0.44.1 #fpga #verilog #hardware

  40. ffp

    Program iCE40 FPGAs and SPI flash memories

    v1.3.0 #spi-flash #fpga #ice40 #memories #programmers

  41. fayalite

    Hardware Description Language embedded in Rust, using FIRRTL's semantics

    v0.2.0 140 #fpga #hdl #firrtl #semiconductor

  42. libmcl-sys

    This system crate provides Rust language bindings to the Minos Compute Library (MCL)

    v0.1.2 #run-time #hpc #heterogeneous #fpga #gpu

  43. casperfpga

    monitor and control of CASPER FPGA deivces

    v0.2.2 #astronomy #fpga

  44. xrt

    Wrapper for the Xilinx Runtime Library (XRT)

    v0.3.0 140 #run-time #xilinx #kernel #devices #buffer #fpga #native-api

  45. beastlink

    Rust bindings for CESYS beastlink

    v1.0.0 #fpga #bindings

  46. xc2par

    Unofficial open-source Coolrunner-II place-and-route

    v0.0.2 #fpga #place-and-route #coolrunner-ii #xilinx #toolchain #irc #openfpga #cpld #trouble #cypress

  47. rust_hls

    Support crate for rust_hls

    v0.2.0 #high-level-synthesis #fpga #verilog #bambu

  48. rust_hdl_private_macros

    Macro support for RustHDL

    v0.44.0 #fpga #verilog #hardware

  49. rust-hdl-ok-frontpanel-sys

    OpalKelly FrontPanel library wrapper for the RustHDL crate

    v0.46.0 120 #fpga #verilog #hardware

  50. tapcp

    protocol for CASPER FPGA devices

    v0.2.1 #fpga #astronomy #tftp

  51. casper_utils

    interacting with CASPER FPGA file formats

    v0.2.1 #astronomy #fpga

  52. hdl-bsp-orange-crab

    Support crate for Rust HDL - provides Board Support Package for the Orange Crab board

    v0.1.0 #fpga #verilog #hardware

    53. Try searching with DuckDuckGo.

  53. ni-fpga-sys

    Rust bindings to the NI FPGA C API

    v1.0.1 #fpga #array #bindings #interface #offset #fixed-sized #following-types

  54. rust-hdl-sim

    Write firmware for FPGAs in Rust - Simulation crate

    v0.46.0 180 #fpga #verilog #hardware

  55. nifpga

    interfacing with NI RIO FPGAs

    v0.1.2 #fpga #interfacing #rio #api #io

  56. fayalite-proc-macros-impl

    detail of fayalite -- the procedural macros' implementations

    v0.2.0 150 #fpga #hdl #firrtl #hardware #semiconductor

  57. xelis_hash

    A Xelihash optimize algo package

    v0.1.3 #optimization #fpga #hash #xelis #scratchpad #algo

  58. extract_rust_hdl_interface

    Extracts the information needed for a rust-hdl module from a verilog module

    v0.2.0 #fpga #verilog #rust-hdl

  59. minroot-core

    Pure Rust reference implementation of MinRoot VDF field arithmetic

    v0.1.1 #pallas #vdf #math #reference #field-element #montgomery #prime-field #vesta #redundant #fpga

  60. rust-hdl-bsp-colorlight-i5

    Support crate for RustHDL - provides Board Support Package for the Colorlight i5 board (Lattice LFE5U-25F-6BG381C based)

    v0.45.1 #fpga #verilog #hardware

  61. wrap_verilog_in_rust_hdl_macro

    A proc-macro to wrap Verilog code in a rust-hdl module

    v0.1.1 #verilog #fpga #wrap #rust-hdl #macro

  62. xlogic

    Package for developing, building, testing, packaging and deploying FPGA and ASIC projects

    v0.1.0 #fpga #asic #building #testing #deployment #packaging #fpga-and-asic #packaging-and-deploying #toc

  63. cyclone-fpga

    FPGA driver

    v0.1.0-pre #elliptic-curve #fpga #msm #cryptography

  64. iceprogrs

    SPI-based SRAM programmer for Lattice iCE40 family FPGAs

    v0.1.1 #spi-based #fpga #programmers #sram #ice40

  65. vpi_export

    Export Rust function to be used on a verilog module through VPI

    v0.1.9 650 #fpga #vpi #verilog #ffi #no-std

  66. rust-hdl-core

    Write firmware for FPGAs in Rust - core crate

    v0.46.0 130 #fpga #verilog #hardware

  67. rust-hdl-bsp-tang-nano-4k

    Support crate for RustHDL - provides Board Support Package for the Tang Nano 4K board (Gowin GW1NSR-LV4C based)

    v0.45.1 #fpga #verilog #hardware

  68. cyclone-v

    Cyclone V FPGA programming library for Rust

    v0.1.0 #fpga #intel #low-level

  69. retronomicon-dto

    Data transfer objects for the Retronomicon API

    v0.2.3 #dto #retronomicon #fpga

  70. litex

    Running Rust on the (Linux) Litex VexRiscv FPGA SOC

    v0.1.3 #linux #vex-riscv #soc #fpga #running #elf #scala

  71. warp-devices

    interfacing with Xilinx XDMA FPGAs

    v0.3.1 #xilinx #fpga #devices #cms #card #warpshell

  72. xlogic-compiler

    Package for developing, building, testing, packaging and deploying FPGA and ASIC projects

    v0.1.0 #fpga #xlogic #asic #building #testing #packaging #fpga-and-asic #packaging-and-deploying #toc

  73. nifpga-sys

    bindings to NI FPGA C API

    v0.1.1 #fpga #bindings #io

  74. rust_hdl_lib_ok_frontpanel_sys

    OpalKelly FrontPanel library wrapper for the RustHDL crate

    v0.44.0 #fpga #verilog #hardware

  75. yarig_macro

    Macro for yarig

    v0.15.0 110 #register #generator #macro #yarig #fpga #hardware-register #control-register #latex

  76. mister-fpga

    work with the MiSTer FPGA Cores API

    v0.1.0 #fpga #emulation

  77. fayalite-proc-macros

    detail of fayalite -- the procedural macros

    v0.2.0 140 #fpga #hdl #hardware #firrtl #semiconductor

  78. one-fpga

    One FPGA general traits and types

    v0.1.0 #fpga #traits #types #and #emulation

  79. gaffe-xilinx

    Parsers and manipulation tools for Xilinx bitstream formats

    v0.1.0 #xilinx #fpga

  80. sus-proc-macro

    Proc-macros for use in the sus-compiler

    v0.3.10 #fpga #hdl #proc-macro #sus

  81. xlogic-tests

    Package for developing, building, testing, packaging and deploying FPGA and ASIC projects

    v0.1.0 #fpga #xlogic #testing #asic #building #packaging #fpga-and-asic #packaging-and-deploying

  82. warpshell

    interfacing with Xilinx FPGAs

    v0.1.0 #xilinx #fpga #interfacing

  83. rust-hdl-macros

    Macro support for RustHDL

    v0.46.0 130 #fpga #verilog #hardware

  84. retronomicon

    managing the retronomicon database, including uploading and downloading artifacts

    v0.1.0 #database #fpga #emulation #release #hardware

  85. rust_hdl_lib_macros

    Macro support for RustHDL

    v0.44.1 #fpga #verilog #hardware