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| SIS: A system for sequential circuit synthesis ME Sentovich Memorandom no. UCB/ERL M92/41, 1992 | 2481 | 1992 |
| MIS: A multiple-level logic optimization system RK Brayton, R Rudell, A Sangiovanni-Vincentelli, AR Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1987 | 1675 | 1987 |
| System-level design: Orthogonalization of concerns and platform-based design K Keutzer, AR Newton, JM Rabaey, A Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 2000 | 1365 | 2000 |
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| Hardware-software co-design of embedded systems: the POLIS approach F Balarin, P Giusto, A Jurecska, C Passerone, E Sentovich, B Tabbara, ... Springer Science & Business Media, 2012 | 1134 | 2012 |
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| The TimberWolf placement and routing package C Sechen, A Sangiovanni-Vincentelli IEEE Journal of Solid-State Circuits 20 (2), 510-522, 1985 | 778 | 1985 |
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| Steady-state methods for simulating analog and microwave circuits KS Kundert, JK White, AL Sangiovanni-Vincentelli Springer Science & Business Media, 2013 | 716 | 2013 |
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| Model predictive control with signal temporal logic specifications V Raman, A Donzé, M Maasoumy, RM Murray, A Sangiovanni-Vincentelli, ... 53rd IEEE Conference on Decision and Control, 81-87, 2014 | 645 | 2014 |
| Domain randomization and pyramid consistency: Simulation-to-real generalization without accessing target domain data X Yue, Y Zhang, S Zhao, A Sangiovanni-Vincentelli, K Keutzer, B Gong 2019 IEEE/CVF International Conference on Computer Vision (ICCV), 2100-2110, 2019 | 626 | 2019 |
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