The paper presents a new design approach for AES SubBytes transformation (S-box) by using the Linear Feedback Shift Register (LFSR). In the past, composite field arithmetic (CFA) is commonly deployed as it effectively produces lightweight and pure combinational architecture. Unfortunately, the downside of this methodology is that the resultant circuitry is complex in nature, which leads to long critical path and high power consumption. On the other hand, the proposed solution in this work is relatively simple which comprised of a pair of identical LFSRs, two comparators and a multiplexer. LFRS is employed to replace the CFA in performing the multiplicative inversion over GF(2 ⁸ ). The resultant architecture is proven to consume less hardware space and having low routing complexity, hence suitable for lightweight embedded devices.