[PDF][PDF] An ultra low-power programmable DSP system for hearing aids and other audio applications

T Schneider, R Brennan, P Balsiger, A Heubi - Proc. ICSPAT 1999, 1999 - Citeseer
This paper describes an application specific signal processor (ASSP) designed for miniature,
ultra low-power, audio signal processing applications. The ASSP includes a high-fidelity …

Micro power" relative precision" 13 bits cyclic RSD A/D converter

A Heubi, P Balsiger, F Pellandini - Proceedings of 1996 …, 1996 - ieeexplore.ieee.org
"Relative precision" A/D and D/A converters are presented. They feature a limited signal-to-noise
ratio but have a dynamic range of 13 to 14 bits. These characteristics are achieved by …

An 8-bit low-power ADC array for CMOS image sensors

S Tanner, A Heubi, M Ansorge… - 1998 IEEE International …, 1998 - ieeexplore.ieee.org
The paper presents an original analog-to-digital converter (ADC) array meeting the
constraining requirements in resolution, speed, size, and low power consumption of high-…

Implementation of a micro power 15-bit'floating-point'A/D converter

L Grisoni, A Heubi, P Balsiger… - Proceedings of 1996 …, 1996 - ieeexplore.ieee.org
Micro power A/D converter are required for power sensitive, battery-operated equipment such
as hearing aids. This paper overviews the principles of the 15-bit 'floating point' converter …

[PDF][PDF] A low power VLSI architecture with an application to adaptive algorithms for digital hearing aids

A Heubi, S Grassi, M Ansorge… - Signal Processing VII …, 1994 - researchgate.net
In the fields of telecommunications, hearing aids, and electronic instrumentation, there is an
important demand for new generations of high performance portable applications. The …

[PDF][PDF] A Study of a VLSI Implementation of a Noise Reduction Algorithm for Digital Hearing Aids

S Grassi, A Heubi, M Ansorge, F Pellandini - Proc. EUSIPCO, 1994 - Citeseer
A methodology for meeting the tight constraints in the physical realization of functional
blocks for digital hearing aids was applied to the implementation of a noise reduction system …

[PDF][PDF] Micro power high-resolution A/D converter

C Robert, L Grisoni, A Heubi, P Balsiger… - Proc. of Int. Conf …, 1999 - researchgate.net
Due to their low number of biased components, algorithmic A/D converters are often used in
low power implementations. This paper describes an algorithm developed at the Institute of …

[PDF][PDF] A 10-bit low-power dual-channel ADC with active element sharing

S Tanner, A Heubi, M Ansorge, F Pellandini - Proc. ISIC99, 1999 - researchgate.net
The paper presents two techniques to improve an RSD (Redundant Signed Digit) switched-capacitor
pipelined analog-to-digital converter (ADC) architecture. The first is based on an …

[PDF][PDF] An automated design methodology for the mapping of DSP algorithms into low power VLSI architectures,"

A Heubi, FPP Balsiger, F Pellandini - 7th International Symposium on IC …, 1997 - Citeseer
A design methodology suitable for an effective low power VLSI implementation of a large
class of digital signal processing algorithms is presented, which shows to be particularly well-…

[PDF][PDF] Efficient Sub-band Coder Implementation for Portable Low-power Applications

A Drollinger, D Sun, C Waelchli, A Heubi… - Proceedings of Int'l …, 1999 - Citeseer
This paper presents a low-power co-processor designed for power-efficient, real-time mono
and stereo Weighted Overlap-Add (WOLA) filterbank processing. The filterbank easily …