User profiles for Wonsun Ahn

Wonsun Ahn

University of Pittsburgh
Verified email at cs.pitt.edu
Cited by 681

POSH: a TLS compiler that exploits program structure

W Liu, J Tuck, L Ceze, W Ahn, K Strauss… - Proceedings of the …, 2006 - dl.acm.org
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood,
it is important to focus on TLS compilation. TLS compilers are interesting in that, while …

Improving JavaScript performance by deconstructing the type system

W Ahn, J Choi, T Shull, MJ Garzarán… - ACM SIGPLAN …, 2014 - dl.acm.org
Increased focus on JavaScript performance has resulted in vast performance improvements
for many benchmarks. However, for actual code used in websites, the attained …

BulkCompiler: High-performance sequential consistency through cooperative compiler and hardware support

W Ahn, S Qi, M Nicolaides, J Torrellas, JW Lee… - Proceedings of the …, 2009 - dl.acm.org
A platform that supported Sequential Consistency (SC) for all codes --- not only the well-synchronized
ones --- would simplify the task of programmers. Recently, several hardware …

Live code update for IoT devices in energy harvesting environments

C Zhang, W Ahn, Y Zhang… - 2016 5th Non-Volatile …, 2016 - ieeexplore.ieee.org
The number of Internet of Things (IoT) devices is exhibiting explosive growth. These devices
are often closely coupled to the physical world, and may harvest energy as a power source, …

A depth-aware swap insertion scheme for the qubit mapping problem

C Zhang, Y Chen, Y Jin, W Ahn, Y Zhang… - arXiv preprint arXiv …, 2020 - arxiv.org
The rapid progress of physical implementation of quantum computers paved the way of realising
the design of tools to help users write quantum programs for any given quantum devices…

SoftSig: software-exposed hardware signatures for code analysis and optimization

J Tuck, W Ahn, L Ceze, J Torrellas - ACM SIGOPS Operating Systems …, 2008 - dl.acm.org
Many code analysis techniques for optimization, debugging, or parallelization need to perform
runtime disambiguation of sets of addresses. Such operations can be supported efficiently …

Scalablebulk: Scalable cache coherence for atomic blocks in a lazy environment

X Qian, W Ahn, J Torrellas - 2010 43rd Annual IEEE/ACM …, 2010 - ieeexplore.ieee.org
Recently-proposed architectures that continuously operate on atomic blocks of instructions (also
called chunks) can boost the programmability and performance of shared-memory …

The bulk multicore architecture for improved programmability

…, J Tuck, C Cascaval, P Montesinos, W Ahn… - Communications of the …, 2009 - dl.acm.org
… BY JoSEP toRRELLaS, LuiS CEzE, JamES tuCK, CaLin CaSCaVaL, PaBLo montESinoS,
WonSun ahn, anD miLoS PRVuLoViC … Wonsun Ahn (dahn2@uiuc.edu) is a graduate …

Dynamically detecting and tolerating if-condition data races

S Qi, AA Muzahid, W Ahn… - 2014 IEEE 20th …, 2014 - ieeexplore.ieee.org
An IF-Condition Invariance Violation (ICIV) occurs when, after a thread has computed the
control expression of an IF statement and while it is executing the THEN or ELSE clauses, …

[PDF][PDF] Automated Fingerprinting of Performance Pathologies Using Performance Monitoring Units ({{PMUs}})

W Yoo, K Larson, L Baugh, S Kim, W Ahn… - 2011 - usenix.org
Modern architectures provide access to many hardware performance events, which are
capable of providing insight into architectural performance bottlenecks throughout the core and …