Accelerating deep learning inference in constrained embedded devices using hardware loops and a dot product unit

…, P Bientinesi, R Leupers, Z Brezočnik - IEEE …, 2020 - ieeexplore.ieee.org
Deep learning algorithms have seen success in a wide variety of applications, such as
machine translation, image and speech recognition, and self-driving cars. However, these …

Emergence of intelligence in next-generation manufacturing systems

M Brezocnik, J Balic, Z Brezocnik - Robotics and computer-integrated …, 2003 - Elsevier
In the paper we propose a fundamental shift from the present manufacturing concepts and
problem solving approaches towards new manufacturing paradigms involving phenomena …

ACTLW–An action-based computation tree logic with unless operator

R Meolic, T Kapus, Z Brezočnik - Information Sciences, 2008 - Elsevier
Model checkers for systems represented by labelled transition systems are not as extensively
used as those for systems represented by Kripke structures. This is partially due to the lack …

SpinRCP: the Eclipse rich client platform integrated development environment for the Spin model checker

Z Brezočnik, B Vlaovič, A Vreže - Proceedings of the 2014 International …, 2014 - dl.acm.org
SpinRCP is an integrated development environment for the Spin model checker used for
verifying the correctnesses of concurrent and distributed systems. Using SpinRCP, it is easy to …

Automated generation of Promela model from SDL specification

B Vlaovič, A Vreže, Z Brezočnik, T Kapus - Computer Standards & Interfaces, 2007 - Elsevier
This paper presents our research in the domain of automated generation of a model from an
SDL (Specification and Description Language) system specification. We use the Spin (…

Formal hardware specification and verification using Prolog

Z Brezočnik, B Horvat - Microprocessing and Microprogramming, 1989 - Elsevier
This paper presents an approach to formal specification and functional verification of digital
hardware designs. Both synchronous and asynchronous as well as combinational circuits …

Eclipse plug-in for spin and st2msc tools-tool presentation

T Kovše, B Vlaovič, A Vreže, Z Brezočnik - Model Checking Software: 16th …, 2009 - Springer
In this article we present an Eclipse plug-in for Spin and st2msc tools. The plug-in can be
used to edit a Promela model, run the formal verification of the model, and generate optimized …

[PDF][PDF] Verification of concurrent systems using ACTL

R Meolic, T Kapus, Z Brezocnik - … of the IASTED international conference AI, 2000 - Citeseer
Formal verification of concurrent systems is extensively studied in last decades. A typical
verification problem consists of formally establishing a relationship between a design and a …

Sdl2pml—Tool for automated generation of Promela model from SDL specification

A Vreže, B Vlaovič, Z Brezočnik - Computer Standards & Interfaces, 2009 - Elsevier
This paper presents research results from the field of automated generation of verification
model from real-life SDL (Specification and Description Language) specification of the system. …

Packet based telephony

B Vlaovic, Z Brezocnik - EUROCON'2001. International …, 2001 - ieeexplore.ieee.org
This paper describes methods used to place telephone calls over packet-based networks
with emphasis on Internet point-to-point communication. Two approaches will be described-H.…