PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques
2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2022•ieeexplore.ieee.org
DRAM-based main memory is used in nearly all computing systems as a major component.
Modern memory-intensive workloads have increasing memory bandwidth, latency, and
capacity requirements. However, DRAM vendors often prioritize memory capacity scaling
over latency and bandwidth [1]–[4]. As a result, main memory is an increasingly worsening
bottleneck in computing systems [3, 5–9].
Modern memory-intensive workloads have increasing memory bandwidth, latency, and
capacity requirements. However, DRAM vendors often prioritize memory capacity scaling
over latency and bandwidth [1]–[4]. As a result, main memory is an increasingly worsening
bottleneck in computing systems [3, 5–9].
DRAM-based main memory is used in nearly all computing systems as a major component. Modern memory-intensive workloads have increasing memory bandwidth, latency, and capacity requirements. However, DRAM vendors often prioritize memory capacity scaling over latency and bandwidth [1]–[4]. As a result, main memory is an increasingly worsening bottleneck in computing systems [3,5–9].
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