Currents f70wing in the power and ground(P@ G) lines of CMOS digital circuits afect both circuit reliability and performance by c? using excessive voltage drops. Maxtmum current esttmates are therefore needed in the P@ G lines to determine the severity of the volta, ge drop problems and to pro erly f design the supply ltnes to ehmtnate these prob ems. These currents, however, depend on the specz, c in-5$ put pat~ erns that are apphed to the ctrcuit. mce tt w prohtbttively expensive to enumerate all possible in-puts, this problem has, for a long time, remained largely unsolved. In [1], we proposed a pattern-independent, linear time algorithm(iMax) that estimates an upper bound envelope of all possible current waveforms that