Activity for Quite Universal Circuit Simulator

  • Felix Felix committed [f8f705] on Git

    Merge Turkish translations update

  • GitHub committed [d26966] on Git

    Fix typo in translation for number of copies

  • GitHub committed [4e7bef] on Git

    Update Turkish translations in qtgeneric_tr.ts

  • GitHub committed [0771bb] on Git

    Refine Turkish translations in qtgeneric_tr.ts

  • Andre Larochelle Andre Larochelle posted a comment on discussion Open Discussion

    Is there a version for Apple Silicone. I have a Mac Mini M4.

  • Felix Felix committed [efdec3] on Git

    improve wire label dump/parse

  • Felix Felix committed [772cbe] on Git

    fix port access in position dump

  • Felix Felix committed [9f59a7] on Git

    fix position in graphics item dump

  • Felix Felix committed [c38a9f] on Git

    dump wire labels as nodes

  • Felix Felix committed [993a3e] on Git

    cleanup Schematic::dumpVerilogComponent

  • Felix Felix committed [ded0d0] on Git

    fix comment

  • Felix Felix committed [cd9d7e] on Git

    bump ref. missing connections

  • Felix Felix committed [677270] on Git

    Reading Verilog: Wire labels

  • Felix Felix committed [1a8af8] on Git

    Update Tests: Verilog Dump

  • Felix Felix committed [1d9829] on Git

    Verilog Dump: Dump Wire Label position

  • Felix Felix committed [153cf4] on Git

    net label test

  • Felix Felix committed [9aeedd] on Git

    fix indent. went wrong in 386426dd8eaf

  • David Lanzendörfer committed [d3a094] on Git

    Removing unused code

  • Felix Felix committed [18ba69] on Git

    test status

  • David Lanzendörfer committed [386426] on Git

    Parse attribut DRY fix

  • Felix Felix committed [c5f5b5] on Git

    Merge preamble

  • David Lanzendörfer committed [03439b] on Git

    Introducing preample loading

  • David Lanzendörfer committed [60777d] on Git

    Fix DRY violation

  • David Lanzendörfer committed [e5931e] on Git

    Element "center and relative boundings" are private

  • Felix Felix committed [54ba22] on Git

    Merge experimental Verilog-S dump/load

  • David Lanzendörfer committed [1517fe] on Git

    Verilog Parsing: Parse visibility

  • David Lanzendörfer committed [80b70f] on Git

    Regenerating Verilog Schematics

  • Felix Felix committed [217d40] on Git

    create sch and vs round trip diffs during tests

  • Felix Felix committed [3e4654] on Git

    superficial testing

  • David Lanzendörfer committed [88292c] on Git

    Verilog Schematic: Visibility of properties

  • David Lanzendörfer committed [e320dd] on Git

    Paintings: Introducing setter and getter for attributes

  • Felix Felix committed [702cd4] on Git

    sync ctos with gnucap/develop & test

  • Felix Felix committed [d12be2] on Git

    fix S__text type

  • Felix Felix committed [bb49da] on Git

    ROADMAP, TODO update

  • Felix Felix committed [a5285e] on Git

    cleanup prj_log_compiler

  • David Lanzendörfer committed [83e055] on Git

    Verilog Dump: Painting/GraphicText dumping

  • David Lanzendörfer committed [67ba68] on Git

    Updating the Verilog schematics

  • Felix Felix committed [2a731c] on Git

    bugfix lang_verilog. always prefer qucs_type attribute

  • Felix Felix committed [1d24b6] on Git

    fix include in lang_verilog

  • Felix Felix committed [814968] on Git

    errors and warnings in component

  • David Lanzendörfer committed [3b4b5d] on Git

    Adding integrity check

  • David Lanzendörfer committed [50e06d] on Git

    Add label name getter method

  • David Lanzendörfer committed [d9cce3] on Git

    Write nodes out as wires

  • Felix Felix committed [d8ad06] on Git

    fix compile warnings, add Wire::port

  • David Lanzendörfer committed [4f7b74] on Git

    Add a warn method to Schematic

  • David Lanzendörfer committed [821275] on Git

    Add nodename_at function

  • David Lanzendörfer committed [3f791f] on Git

    Adding set_port_by index functionality

  • David Lanzendörfer committed [cb6483] on Git

    Bug fix: Solving save-as issue

  • David Lanzendörfer committed [d566e9] on Git

    Bugfix: Open .vs files as schematic

  • Felix Felix committed [15614b] on Git

    fix qt rules in various qucs-*/Makefile.am

  • Felix Felix committed [e58646] on Git

    Merge 'comp_loading'

  • David Lanzendörfer committed [d33379] on Git

    Using dump/parse identifier from Gnucap

  • Felix Felix committed [6e908c] on Git

    missing lib test

  • David Lanzendörfer committed [330d68] on Git

    Positioning components without ports

  • Felix Felix committed [fd3b63] on Git

    more cleanup

  • David Lanzendörfer committed [655950] on Git

    Move code over to correct compilation unit

  • Felix Felix committed [059140] on Git

    smart pointer conversion fix

  • Felix Felix committed [f0dc33] on Git

    Merge wire_cleanup

  • Felix Felix committed [131502] on Git

    cleanup node interface a bit

  • Felix Felix committed [b287c4] on Git

    missing test file

  • Felix Felix committed [b4969f] on Git

    split off LegacyComponent

  • Felix Felix committed [319ea4] on Git

    move up "Component" class

  • Felix Felix committed [bf01f1] on Git

    prepare Wire ports cleanup

  • Felix Felix committed [0b98b9] on Git

    hello world ngspice

  • Felix Felix committed [a28d41] on Git

    hello world example

  • Felix Felix committed [eb405c] on Git

    more Verilog_File cleanup and disentangle

  • Felix Felix committed [469c2f] on Git

    "Verilog" device. initial fixes

  • Felix Felix committed [ab9f0d] on Git

    some more parameters are attributes

  • Felix Felix committed [a716ea] on Git

    Makefile fixes

  • Felix Felix committed [3f02b9] on Git

    Merge wire placement

  • David Lanzendörfer committed [23556f] on Git

    Initial code for wire placement

  • David Lanzendörfer committed [8a8777] on Git

    Component placement

  • Felix Felix committed [adae75] on Git

    Merge 'lib'

  • Felix Felix committed [0fbf6d] on Git

    cleanup/fix Sub

  • Felix Felix committed [a91de9] on Git

    cleanup/fix Lib

  • Felix Felix committed [45e870] on Git

    more

  • Felix Felix committed [7d8a06] on Git

    Merge read_verilog

  • Felix Felix committed [d7333c] on Git

    fix parameter parsing

  • Felix Felix committed [7d825f] on Git

    fix out of range Props access, try #2

  • David Lanzendörfer committed [992a41] on Git

    Solve crash when dumping netlists/fix refs

  • Felix Felix committed [bba8c1] on Git

    fix compile warnings

  • Felix Felix committed [fe4562] on Git

    Solving uninitialized value warning

  • Felix Felix committed [495080] on Git

    cleanup, disentangle dumpDeclaration

  • Felix Felix committed [495080] on Git

    cleanup, disentangle dumpDeclaration

  • David Lanzendörfer committed [5e58be] on Git

    Verilog Dump: Change order

  • Felix Felix committed [477ccd] on Git

    Component "text position" is private

  • Felix Felix committed [aefb0d] on Git

    Solving ref bug: Text position to zero

  • Felix Felix committed [fb24be] on Git

    add missing ref for unittests

  • Felix Felix committed [05b635] on Git

    reopen QTextStream after file.reset

  • Felix Felix committed [699a43] on Git

    trying to narrow down on bogus QTextStream::atEnd

  • Felix Felix committed [776a73] on Git

    import vanilla trace header, trace readVerilog

  • Felix Felix committed [7a515e] on Git

    review readVerilog

  • Felix Felix committed [c823f4] on Git

    Schematic::readVerilog

  • Felix Felix committed [36c998] on Git

    review lang_verilog.cpp

  • Felix Felix committed [6fc7a1] on Git

    Add separate files for verilog reading

  • Felix Felix committed [d59e07] on Git

    review Component::attr_get & bump ref

  • Felix Felix committed [bf9149] on Git

    back out Component::set_attribute

  • David Lanzendörfer committed [d8811d] on Git

    Verilog Dump/Parsing: Qucs metadata

  • Felix Felix committed [874965] on Git

    annotate few bugs. plans.

  • Felix Felix committed [75e4c1] on Git

    cherry pick from 8448e366cb597e, review

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