MEM_PAGE_BITS						equ		12
MEM_PAGE_SIZE						equ		1 << MEM_PAGE_BITS
MEM_PAGE_OFFSET_MASK				equ		MEM_PAGE_SIZE - 1
MEM_PAGE_ADR_MASK					equ		~MEM_PAGE_OFFSET_MASK
MEM_PAGE_TABLE_BITS					equ		9
MEM_PAGE_TABLE_SIZE					equ		1 << MEM_PAGE_TABLE_BITS
MEM_PAGE_TABLE_OFFSET_MASK			equ		MEM_PAGE_TABLE_SIZE - 1
MEM_PAGE_TABLE_INDEX_MASK			equ		MEM_PAGE_TABLE_OFFSET_MASK << 3
MEM_PAGE_OFFSET_PT					equ		1 << MEM_PAGE_BITS
MEM_PAGE_OFFSET_PD					equ		1 << (MEM_PAGE_BITS + MEM_PAGE_TABLE_BITS)
MEM_PAGE_OFFSET_PDP					equ		1 << (MEM_PAGE_BITS + 2*MEM_PAGE_TABLE_BITS)
MEM_PAGE_OFFSET_PML4				equ		1 << (MEM_PAGE_BITS + 3*MEM_PAGE_TABLE_BITS)
MEM_PAGE_BITS_2M					equ		MEM_PAGE_BITS + MEM_PAGE_TABLE_BITS
MEM_PAGE_SIZE_2M					equ		1 << MEM_PAGE_BITS_2M
MEM_PAGE_OFFSET_MASK_2M				equ		MEM_PAGE_SIZE_2M - 1
MEM_PAGE_BITS_1G					equ		MEM_PAGE_BITS_2M + MEM_PAGE_TABLE_BITS
MEM_PAGE_SIZE_1G					equ		1 << MEM_PAGE_BITS_1G
MEM_PAGE_OFFSET_MASK_1G				equ		MEM_PAGE_SIZE_1G - 1
MEM_PAGE_PRESENT_BIT				equ		0
MEM_PAGE_WRITEABLE_BIT				equ		1
MEM_PAGE_USER_ACCESS_BIT			equ		2
MEM_PAGE_CACHE_WRITETHROUGH_BIT		equ		3
MEM_PAGE_CACHE_DISABLE_BIT			equ		4
MEM_PAGE_ACCESSED_BIT				equ		5
MEM_PAGE_DIRTY_BIT					equ		6
MEM_PAGE_ATTRIBUTE_TABLE_BIT		equ		7
MEM_PAGE_1GBYTE_BIT					equ		7
MEM_PAGE_GLOBAL_BIT					equ		8
MEM_PAGE_AVAILABLE1_BIT				equ		9
MEM_PAGE_AVAILABLE2_BIT				equ		10
MEM_PAGE_PSEUDO_BIT					equ		11	; indicates a pseudo page
MEM_PAGE_NO_EXECUTE_BIT				equ		63
MEM_PAGE_PRESENT					equ		1 << MEM_PAGE_PRESENT_BIT
MEM_PAGE_WRITEABLE					equ		1 << MEM_PAGE_WRITEABLE_BIT
MEM_PAGE_USER_ACCESS				equ		1 << MEM_PAGE_USER_ACCESS_BIT
MEM_PAGE_CACHE_WRITETHROUGH			equ		1 << MEM_PAGE_CACHE_WRITETHROUGH_BIT
MEM_PAGE_CACHE_DISABLE				equ		1 << MEM_PAGE_CACHE_DISABLE_BIT
MEM_PAGE_ACCESSED					equ		1 << MEM_PAGE_ACCESSED_BIT
MEM_PAGE_DIRTY						equ		1 << MEM_PAGE_DIRTY_BIT
MEM_PAGE_ATTRIBUTE_TABLE			equ		1 << MEM_PAGE_ATTRIBUTE_TABLE_BIT
MEM_PAGE_1GBYTE						equ		1 << MEM_PAGE_1GBYTE_BIT
MEM_PAGE_GLOBAL						equ		1 << MEM_PAGE_GLOBAL_BIT
MEM_PAGE_AVAILABLE1					equ		1 << MEM_PAGE_AVAILABLE1_BIT
MEM_PAGE_AVAILABLE2					equ		1 << MEM_PAGE_AVAILABLE2_BIT
MEM_PAGE_PSEUDO						equ		1 << MEM_PAGE_PSEUDO_BIT
MEM_PAGE_NO_EXECUTE					equ		1 << MEM_PAGE_NO_EXECUTE_BIT
MEM_PAGE_AVAILABLE_CREATE_ON_WRITE	equ		MEM_PAGE_AVAILABLE1
MEM_PAGE_AVAILABLE_COPY_ON_WRITE	equ		MEM_PAGE_AVAILABLE2
;MEM_PAGE_SPECIAL_STACK0_UNDERFLOW          equ 1
;MEM_PAGE_SPECIAL_STACK0_OVERFLOW           equ 1
;MEM_PAGE_SPECIAL_STACK0_LIMIT              equ 1
;MEM_PAGE_SPECIAL_GROW_DOWN                equ 0x00000000_00000010
;MEM_PAGE_SPECIAL_GROW_UP                  equ 0x00000000_00000020
;MEM_PAGE_SPECIAL_GROW_DOWN_WRITETHROUGH   equ 0x00000000_00000030
;MEM_PAGE_SPECIAL_GROW_UP_WRITETHROUGH     equ 0x00000000_00000040
;MEM_PAGE_SPECIAL_READ_ONLY                equ 0x00000000_00000050
;MEM_PAGE_SPECIAL_END                      equ 0x00000000_00000070
;MEM_INTERRUPT_RP_OFFSET					equ		0x90
MEM_INTERRUPT_RP_OFFSET					equ		0x800
MEM_PAD_OFFSET							equ		0x800
MEM_BDA_BASE							equ		0x00000000_00000400   ; bios data area
MEM_SYSVAR_BASE							equ		0x00000000_00000600
MEM_MBR_BASE							equ		0x00000000_00000600
MEM_BOOT_PARAMETER_STACK				equ		0x00000000_000009f0
MEM_BOOT_RETURN_STACK					equ		0x00000000_00000ff0
MEM_BOOT_BASE							equ		0x00000000_00001000
MEM_PML4								equ		0x00000000_00001000
MEM_PDP									equ		0x00000000_00002000
MEM_PD									equ		0x00000000_00003000
MEM_PT1									equ		0x00000000_00004000
MEM_PT2									equ		0x00000000_00005000
MEM_ZERO_PAGE_BASE						equ		0x00000000_00006000
MEM_VBE_CONTROLLER_INFO					equ		0x00000000_00007000
MEM_VBE_MODE_INFO						equ		MEM_VBE_CONTROLLER_INFO + 512
MEM_VBE_ACTIVE_MODE_INFO				equ		MEM_VBE_MODE_INFO + 256
MEM_VBE_ACTIVE_CRTC_INFO				equ		MEM_VBE_ACTIVE_MODE_INFO + 256
MEM_BIOS_BOOT_BASE						equ		0x00000000_00007C00
MEM_BOOT_MEMINFO_BASE					equ		0x00000000_00008004
MEM_BOOT_MEMINFO_SIZE					equ		0x20
MEM_BOOT_86EMULATOR_STACK				equ		0x00000000_00008ff0
MEM_FREE_PAGE_1							equ		0x00000000_00009000
MEM_FREE_PAGE_2							equ		0x00000000_0000A000
MEM_FREE_PAGE_3							equ		0x00000000_0000B000
MEM_TASK_BASE							equ		0x00000000_0000C000
MEM_BIOS_EMULATOR_STACK					equ		0x00000000_0000D000
MEM_INIT_BASE							equ		0x00000000_0000E000
MEM_CODE_BASE							equ		0x00000000_0000F000
MEM_CODE_END							equ		0x00000000_00090000
MEM_FONT_BASE							equ		0x00000000_00100000		; the picture of all bitmap fonts are placed here
MEM_BOOTSOURCE_BASE						equ		0x00000000_00300000		; boot source code (Forth)
MEM_BOOTSOURCE_LISP_BASE				equ		0x00000000_003c0000		; boot source code (Lisp)
MEM_FREE_BASE							equ		0x00000000_00400000		; start of free space
MEM_BOOT_CODE_FIRST_SECTOR				equ		0x400
MEM_BOOT_CODE_NO_OF_SECTORS				equ		0x400
MEM_BOOT_BITMAP_FIRST_SECTOR			equ		MEM_BOOT_CODE_FIRST_SECTOR + MEM_BOOT_CODE_NO_OF_SECTORS
MEM_BOOT_BITMAP_NO_OF_SECTORS			equ		(MEM_BOOTSOURCE_BASE - MEM_FONT_BASE) / 512
MEM_BOOT_SOURCE_FIRST_SECTOR			equ		MEM_BOOT_BITMAP_FIRST_SECTOR + MEM_BOOT_BITMAP_NO_OF_SECTORS
MEM_BOOT_SOURCE_NO_OF_SECTORS			equ		(MEM_FREE_BASE - MEM_BOOTSOURCE_BASE) / 512
MEM_BOOT_AREA1_ADR						equ		MEM_INIT_BASE
MEM_BOOT_AREA1_SIZE						equ		MEM_BOOT_CODE_NO_OF_SECTORS * 512
MEM_BOOT_AREA2_ADR						equ		MEM_INIT_BASE
MEM_BOOT_AREA2_SIZE						equ		(MEM_BOOT_BITMAP_NO_OF_SECTORS + MEM_BOOT_SOURCE_NO_OF_SECTORS) * 512
MEM_BOOT_DISK_SIZE						equ		500*8*40
MEM_BOOT_SECTOR							equ		34
MEM_BOOT_FISP_SECTOR					equ		40	; first 8 sectors are used for boot loaders
MEM_BOOT_IMAGE_SIZE						equ		0x60000
MEM_BOOT_LOAD_SIZE						equ		0x80000
MEM_BOOT_SOURCE_OFFSET					equ		0x60000
MEM_FISP_BLOCK_SECTOR					equ		2048
MEM_FISP_BLOCK_SIZE						equ		MEM_BOOT_DISK_SIZE - MEM_FISP_BLOCK_SECTOR
MEM_BOOT_BLOCK_0						equ		MEM_INIT_BASE + (65*MEM_PAGE_SIZE)
MEM_BSP_ENTRY							equ		MEM_INIT_BASE+0x100
MEM_AP_ENTRY							equ		MEM_INIT_BASE
MEM_HIGH_GBYTE							equ		0xffffffff_c0000000
MEM_LOCAL_APIC_BASE						equ		0x00000000_fee00000
MEM_IO_APIC_BASE						equ		0x00000000_fec00000
;MEM_INTERRUPT1_STACK                    equ 0x00000000_00095000
;MEM_INTERRUPT2_STACK                    equ 0x00000000_00096000
;MEM_INTERRUPT3_STACK                    equ 0x00000000_00097000
;MEM_INTERRUPT4_STACK                    equ 0x00000000_00098000
;MEM_INTERRUPT5_STACK                    equ 0x00000000_00099000
;MEM_INTERRUPT6_STACK                    equ 0x00000000_0009a000
;MEM_INTERRUPT7_STACK                    equ 0x00000000_0009b000
;MEM_RING0_STACK                         equ 0x00000000_0009c000
;MEM_RING1_STACK                         equ 0x00000000_0009d000
;MEM_RING2_STACK                         equ 0x00000000_0009e000
;MEM_SYSTEM_STACK                        equ 0x00000000_0009f000
MEM_EBDA_BASE							equ		0x00000000_0009fc00    ; extended bios data area
MEM_SCREEN_BASE							equ		0x00000000_000b8000
MEM_SCREEN_WIDTH						equ		80
%define MEM_SCREEN16(x,y) ((x)+(y)*2*MEM_SCREEN_WIDTH)
%define MEM_SCREEN(x,y) (MEM_SCREEN_BASE + MEM_SCREEN16(x,y))
MEM_MEMORY_BASE							equ		0x00000000_00100000     ; 1 MiByte (begin of high memory)
MEM_FREE_MEMORY_BASE					equ		0x00000000_00300000     ; Free memory starts here
MEM_EXTENDED_MEMORY_BASE				equ		0x00000000_01000000     ; 16 MiByte (begin of extended memory)
MEM_UPPER_MEMORY_LIMIT					equ		0x00000000_c0000000     ; addresses after 3 GiByte are reserved for memory mapped I/O
MEM_HIGH_MEMORY_BASE					equ		0x00000001_00000000     ; memory beyond 4 GByte
MEM_MEMORY_LIMIT						equ		0x00000100_00000000     ; 1 TiByte (2^40) physical memory limit
MEM_DICTIONARY_BASE						equ 0x00000100_00000000		; Dictionary starts here
MEM_DICTIONARY_LIMIT					equ 0x00000100_fffff000		; Dictionary size (4 GByte)
MEM_INTERRUPT_GS_BASE					equ 0x00000108_00000000		; GS value for inducing interrupt
MEM_PARAMETER_STACK_LIMIT				equ 0x00000110_00000000		; Parameter stack ends here
MEM_PARAMETER_STACK_BASE				equ 0x00000110_0000f000		; Parameter stack limit (56 KiB)
MEM_RETURN_STACK_LIMIT					equ 0x00000120_00000000		; Return stack ends here
MEM_RETURN_STACK_BASE					equ 0x00000120_0000f000		; Return stack limit (56 KiB)
MEM_OBJECT_STACK_LIMIT					equ 0x00000130_00000000		; Object stack ends here
MEM_OBJECT_STACK_BASE					equ 0x00000130_0000f000		; Object stack limit (56 KiB)
MEM_LISP_STACK_LIMIT					equ 0x00000140_00000000		; Lisp stack ends here
MEM_LISP_STACK_BASE						equ 0x00000140_0000f000		; Lisp stack limit (56 KiB)
MEM_LOCAL_STACK_LIMIT					equ 0x00000150_00000000		; Local stack ends here
MEM_LOCAL_STACK_BASE					equ 0x00000150_0000f000		; Local stack limit (56 KiB)
MEM_PROCESSOR_BASE						equ 0x000001e0_00000000		; processor resources are mapped here
MEM_HELP_BASE							equ 0x000001f0_00000000		; processor resources are mapped here
MEM_HEAP_BASE							equ 0x00000200_00000000		; Heap starts here
MEM_HEAP_LIMIT							equ 0x00000300_00000000		; Heap ends here
MEM_LISP_BASE							equ 0x00000300_00000000		; Lisp memory starts here
MEM_LISP_TYPE_BITS						equ	36
MEM_LISP_TYPE_OFFSET					equ	1 << MEM_LISP_TYPE_BITS
MEM_LISP_TYPE_OFFSET2					equ	1 << (MEM_LISP_TYPE_BITS-1)
MEM_LISP_TYPE_MASK						equ 0x0f
MEM_LISP_BIGINT_BASE					equ MEM_LISP_BASE									; Lisp memory for big integers
MEM_LISP_RATIO_BASE						equ MEM_LISP_BIGINT_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for ratios
MEM_LISP_FIXED_BASE						equ MEM_LISP_RATIO_BASE		+ MEM_LISP_TYPE_OFFSET	; Lisp memory for compiled functions
MEM_LISP_COMPLEX_BASE					equ MEM_LISP_FIXED_BASE		+ MEM_LISP_TYPE_OFFSET	; Lisp memory for complex numbers
MEM_LISP_INTERVAL_BASE					equ MEM_LISP_COMPLEX_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for interval numbers
MEM_LISP_CONS_BASE						equ MEM_LISP_INTERVAL_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for cons
MEM_LISP_SYMBOL_BASE					equ MEM_LISP_CONS_BASE		+ MEM_LISP_TYPE_OFFSET	; Lisp memory for symbols
MEM_LISP_VECTOR_BASE					equ MEM_LISP_SYMBOL_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for arrays
MEM_LISP_STRING_BASE					equ MEM_LISP_VECTOR_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for strings
MEM_LISP_OBJECT_BASE					equ MEM_LISP_STRING_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for objects
MEM_LISP_HASHTABLE_BASE					equ MEM_LISP_OBJECT_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for hash tables
MEM_LISP_MACRO_BASE						equ MEM_LISP_HASHTABLE_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for compiled functions
MEM_LISP_FUNCTION_BASE					equ MEM_LISP_MACRO_BASE		+ MEM_LISP_TYPE_OFFSET	; Lisp memory for compiled functions
MEM_LISP_METHOD_BASE					equ MEM_LISP_FUNCTION_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for compiled methods
MEM_LISP_NAMESPACE_BASE					equ MEM_LISP_METHOD_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for namespaces
MEM_LISP_CLASS_BASE						equ MEM_LISP_NAMESPACE_BASE	+ MEM_LISP_TYPE_OFFSET	; Lisp memory for classes
MEM_LISP_WEAK_BASE						equ MEM_LISP_CLASS_BASE		+ MEM_LISP_TYPE_OFFSET	; Lisp memory for weak pointer
MEM_LISP_LIMIT							equ MEM_LISP_WEAK_BASE		+ MEM_LISP_TYPE_OFFSET	; Lisp memory ends here
;MEM_DICTIONARY_SIZE						equ 1 << 30					; Dictionary size (1 GByte)
;MEM_TASK_MEMORY							equ		MEM_DICTIONARY_BASE + MEM_DICTIONARY_SIZE
	; task memory is used to allocate space for tasks (excl. stacks)
;
;; 1 GiByte memory for parameter stack
;MEM_STACK_BASE                          equ MEM_THREADVAR_LIMIT
;MEM_STACK_BITS                          equ 30  ; 1 GiByte
;MEM_STACK_SIZE                          equ 1 << MEM_STACK_BITS
;MEM_STACK_LIMIT                         equ MEM_STACK_BASE + MEM_STACK_SIZE
;MEM_STACK_UNDERFLOW_PAGE                equ MEM_STACK_LIMIT - MEM_PAGE_SIZE
;MEM_STACK_INIT_ADR                      equ MEM_STACK_UNDERFLOW_PAGE - 0x10
; 1 GiByte memory for return stack
;MEM_RSTACK_BASE                         equ MEM_STACK_LIMIT
;MEM_RSTACK_BITS                         equ 30  ; 1 GiByte
;MEM_RSTACK_SIZE                         equ 1 << MEM_RSTACK_BITS
;MEM_RSTACK_LIMIT                        equ MEM_RSTACK_BASE + MEM_RSTACK_SIZE
;MEM_RSTACK_UNDERFLOW_PAGE               equ MEM_RSTACK_LIMIT - MEM_PAGE_SIZE
;MEM_RSTACK_INIT_ADR                     equ MEM_RSTACK_UNDERFLOW_PAGE - 0x10
; 1 GiByte memory for object stack
;MEM_OSTACK_BASE                         equ MEM_RSTACK_LIMIT
;MEM_OSTACK_BITS                         equ 30  ; 1 GiByte
;MEM_OSTACK_SIZE                         equ 1 << MEM_OSTACK_BITS
;MEM_OSTACK_LIMIT                        equ MEM_OSTACK_BASE + MEM_OSTACK_SIZE
;MEM_OSTACK_UNDERFLOW_PAGE               equ MEM_OSTACK_LIMIT - MEM_PAGE_SIZE
;MEM_OSTACK_INIT_ADR                     equ MEM_OSTACK_UNDERFLOW_PAGE - 0x10
; 1 GiByte memory for lisp stack
;MEM_LSTACK_BASE                         equ MEM_OSTACK_LIMIT
;MEM_LSTACK_BITS                         equ 30  ; 1 GiByte
;MEM_LSTACK_SIZE                         equ 1 << MEM_LSTACK_BITS
;MEM_LSTACK_LIMIT                        equ MEM_LSTACK_BASE + MEM_LSTACK_SIZE
;MEM_LSTACK_UNDERFLOW_PAGE               equ MEM_LSTACK_LIMIT - MEM_PAGE_SIZE
;MEM_LSTACK_INIT_ADR                     equ MEM_LSTACK_UNDERFLOW_PAGE - 0x10
;MEM_HEAP_BASE                           equ 1 << 44                 ; heap is mapped here
;MEM_HEAP_SIZE                           equ 1 << 44                 ; heap limit ( 16 TiByte )
;MEM_LISP_BASE                           equ 1 << 45                 ; lisp memory is mapped here
;MEM_LISP_SIZE                           equ 1 << 45                 ; lisp memory limit ( 32 TiByte )
;MEM_BLOCK_BASE                          equ 1 << 47                 ; heap is mapped here
;MEM_BLOCK_SIZE                          equ 1 << 47                 ; heap limit ( 64 TiByte )
PIC1        equ 0x20
PIC2        equ 0xa0
PIC_ICW1_ICW4	      equ 0x01		; ICW4 (not) needed
PIC_ICW1_SINGLE	    equ 0x02		; Single (cascade) mode
PIC_ICW1_INTERVAL4  equ 0x04		; Call address interval 4 (8)
PIC_ICW1_LEVEL      equ 0x08		; Level triggered (edge) mode
PIC_ICW1_INIT       equ 0x10		; Initialization - required!
PIC_ICW4_DEFAULT    equ 0x01		; 8086/88 (MCS-80/85) mode
PIC_ICW4_AUTO       equ 0x02		; Auto (normal) EOI
PIC_ICW4_BUF_SLAVE  equ 0x08		; Buffered mode/slave
PIC_ICW4_BUF_MASTER equ 0x0C		; Buffered mode/master
PIC_ICW4_SFNM       equ 0x10		; Special fully nested (not)